An AXI DDR3 SDRAM controller for FPGA
☆46Dec 30, 2023Updated 2 years ago
Alternatives and similar repositories for FPGA_DDR3_Ctrl
Users that are interested in FPGA_DDR3_Ctrl are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- asynchronous FIFO that support Non-symmetric aspect ratios(different read and write data widths), First-Word Fall-Through and data counte…☆26Oct 15, 2023Updated 2 years ago
- ☆31Aug 8, 2020Updated 5 years ago
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆93Feb 28, 2018Updated 8 years ago
- This is a multi-core processor specially designed for matrix multiplication using Verilog HDL.☆11Jan 8, 2022Updated 4 years ago
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆14May 15, 2023Updated 2 years ago
- The system is a FPGA-based system that can recognize object in videos.☆16Apr 29, 2025Updated 11 months ago
- Digital IC design and vlsi notes☆14Jun 24, 2020Updated 5 years ago
- ☆31Jan 23, 2021Updated 5 years ago
- a student trainning project for HLS and transformer☆11Oct 19, 2022Updated 3 years ago
- A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA☆226Nov 29, 2023Updated 2 years ago
- R2MDC FFT/IFFT processor adaptive to 64/128/256/512 point☆17Dec 23, 2025Updated 3 months ago
- This repository is used to store RTL code for combining a single video source from multiple video sources.☆18Oct 28, 2024Updated last year
- 利用ZYNQ7020实现SAR数据采集系统，其中包含硬件设计代码、上位机、测试程序。☆14Feb 27, 2025Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Verilog Code for a JPEG Decoder☆34Mar 7, 2018Updated 8 years ago
- Motion Estimation implementation by using Verilog HDL☆13Jun 17, 2024Updated last year
- Wearanize+ is a multimodal sleep dataset containing overnight sleep data from 130 young, healthy participants using PSG and three wearabl…☆20Mar 26, 2026Updated 3 weeks ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- My code repositry for common use.☆23Dec 31, 2021Updated 4 years ago
- Integrated Circuit Design Laboratory(IC Lab) at 2019 Fall, NCTU. Final project is a customized 16 bits ISA processor.☆24Sep 21, 2021Updated 4 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆53Oct 9, 2024Updated last year
- Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.☆15Oct 19, 2024Updated last year
- ☆17Apr 7, 2022Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆37Jun 19, 2023Updated 2 years ago
- OpenExSys_NoC a mesh-based network on chip IP.☆20Dec 1, 2023Updated 2 years ago
- Video Stream Scaler☆40Jul 17, 2014Updated 11 years ago
- Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核☆807Sep 14, 2023Updated 2 years ago
- Fractional interpolation using a Farrow structure☆10Oct 11, 2023Updated 2 years ago
- Turbo coder and decoder☆12Oct 11, 2023Updated 2 years ago
- Antmicro's open source 3G SDI into MIPI CSI-2 converter☆23Aug 7, 2023Updated 2 years ago
- Implementation of a fully-functional digital signal oscilloscope written in Verilog HDL. Tested on a DE-1 SoC 5CSEMA5F31C6 FPGA board. Us…☆24Aug 25, 2023Updated 2 years ago
- FPGA纯逻辑实现modbus通信☆23Sep 5, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Reservoir computing for short-and long-term prediction of chaotic systems, with tasks Lorenz and Mackey-Glass systems. Bayesian optimizat…☆30Jul 19, 2025Updated 8 months ago
- 学习AXI接口，以及xilinx DDR3 IP使用☆40Mar 6, 2017Updated 9 years ago
- An FPGA-based FT232H/FT600 chip controller for rapid data transmission via USB. 使用FT232H/FT600芯片进行FPGA与电脑之间的高速数据传输。☆341May 21, 2024Updated last year
- Physics-Informed Neural Networks for Cardiovascular Blood Flow Simulations☆19Apr 7, 2025Updated last year
- Simple demo showing how to use the ping pong FIFO☆16May 2, 2016Updated 9 years ago
- ☆10Mar 10, 2023Updated 3 years ago
- A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction☆73Aug 13, 2024Updated last year