maxs-well / FIR_Implementation
FIR filter implementation
☆23Updated 4 years ago
Alternatives and similar repositories for FIR_Implementation:
Users that are interested in FIR_Implementation are comparing it to the libraries listed below
- AXI4-Stream FIR filter IP☆13Updated 2 years ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆25Updated 3 years ago
- Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…☆14Updated 4 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆67Updated 2 years ago
- FPGA Technology Exchange Group相关文件管理☆43Updated last year
- 基于FPGA的FFT☆12Updated 6 years ago
- High Radix Adaptive CORDIC Algorithm - Improvement over Traditional CORDIC☆13Updated 8 years ago
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆21Updated last year
- LMS sound filtering by Verilog☆39Updated 4 years ago
- Must-have verilog systemverilog modules☆30Updated 2 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆30Updated 6 years ago
- Reed Solomon Encoder and Decoder Digital IP☆19Updated 4 years ago
- FIR,FFT based on Verilog☆13Updated 7 years ago
- FFT implement by verilog_测试验证已通过☆53Updated 8 years ago
- FPGA 同步FIFO与异步FIFO☆29Updated 5 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆31Updated 3 years ago
- 基于FPGA的三速以太网UDP协议栈设计☆22Updated 10 months ago
- FIR implemention with Verilog☆46Updated 5 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆52Updated 2 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆45Updated 7 months ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- An AXI DDR3 SDRAM controller for FPGA☆30Updated last year
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆20Updated 5 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆49Updated 2 years ago
- Delta-Sigma modulator (DSM) for fractional phase locked loop.☆26Updated 3 years ago
- USB2.0 Verilog☆17Updated 5 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆30Updated 4 years ago
- SPI interface connect to APB BUS with Verilog HDL☆27Updated 3 years ago
- verilog☆21Updated last year