suisuisi/FPGATechnologyGroup external links

---

GitHub - View repository

GitHub.dev - Open in online code editor

Star history - Growth chart over time

deps.dev - Dependencies and security vulnerabilities

Gitingest - Export source code for LLM usage

Repomix - Export source code for LLM usage

uithub - Export source code for LLM usage

Close

suisuisi/FPGATechnologyGroup

Readme badge preview -

If you own this repo, copy the snippet below and add it to your README.md

---

Copy

[![RelatedRepos](https://img.shields.io/badge/related-repos-yellow)](https://relatedrepos.com/gh/suisuisi/FPGATechnologyGroup)

Close

suisuisi / FPGATechnologyGroupView on GitHubMore

• External links
• Readme badge

FPGA Technology Exchange Group相关文件管理

☆67Jan 3, 2026Updated 2 months ago

Alternatives and similar repositories for FPGATechnologyGroup

Users that are interested in FPGATechnologyGroup are comparing it to the libraries listed below

• coralhu123 / KC705-AD9371

  View on GitHub
  The implementation of AD9371 on KC705
  ☆20Jun 10, 2025Updated 8 months ago
• linuxbest / ahci_mpi

  View on GitHub
  an sata controller using smallest resource.
  ☆17Feb 5, 2014Updated 12 years ago
• suisuisi / basic_systemverilog

  View on GitHub
  Must-have verilog systemverilog modules
  ☆37May 1, 2022Updated 3 years ago
• suisuisi / FPGAandLAN

  View on GitHub
  FPGAandLAN
  ☆28Jun 13, 2021Updated 4 years ago
• suisuisi / FPGAandPeripheralInterface

  View on GitHub
  Peripheral Interface of FPGA
  ☆42Jun 13, 2021Updated 4 years ago
• suisuisi / AXI4-Stream-FIR-filter

  View on GitHub
  AXI4-Stream FIR filter IP
  ☆19Nov 4, 2022Updated 3 years ago
• LogicTronix / Vitis-AI-Reference-Tutorials

  View on GitHub
  Tutorials on Vitis AI Created by LogicTronix!
  ☆34Jul 5, 2024Updated last year
• For-up / SEA-S7Guess

  View on GitHub
  SEA-S7_gesture recognition
  ☆17Aug 1, 2020Updated 5 years ago
• fpgasystems / groundhog

  View on GitHub
  Groundhog - Serial ATA Host Bus Adapter
  ☆24Jun 10, 2018Updated 7 years ago
• suisuisi / FPGA_Library

  View on GitHub
  Vivado诸多IP，包括图像处理等
  ☆234Jul 28, 2024Updated last year
• freecores / ethernet_tri_mode

  View on GitHub
  10_100_1000 Mbps tri-mode ethernet MAC
  ☆10Jul 17, 2014Updated 11 years ago
• mcrl / NVMe

  View on GitHub
  ☆35Dec 10, 2023Updated 2 years ago
• r2t2sdr / r2t2

  View on GitHub
  SDR-Transceiver
  ☆10Dec 30, 2019Updated 6 years ago
• ultraembedded / core_spiflash

  View on GitHub
  SPI-Flash XIP Interface (Verilog)
  ☆48Oct 24, 2021Updated 4 years ago
• Kevincoooool / BlueSkyFlightControl

  View on GitHub
  天穹飞控：致力于打造中国最强大的多旋翼开源飞控！
  ☆10Jan 8, 2019Updated 7 years ago
• suisuisi / FPGAandGames

  View on GitHub
  FPGA实现各种小游戏，学习并快乐着
  ☆77May 16, 2022Updated 3 years ago
• KutuSystems / XilinxIP

  View on GitHub
  Xilinx IP repository
  ☆13May 5, 2018Updated 7 years ago
• ATaylorCEngFIET / SP701_Imaging_Vivado

  View on GitHub
  Vivado project for the SP701 Imaging application project
  ☆13Apr 1, 2020Updated 5 years ago
• redchenjs / neopixel_led_controller_max10

  View on GitHub
  NeoPixel LED Controller | NeoPixel LED 控制器 | 基於MAX10 FPGA的音樂全彩光立方LED控制器
  ☆12Jan 4, 2022Updated 4 years ago
• lewiz-support / LMAC_CORE1

  View on GitHub
  LMAC Core1 - Ethernet 1G/100M/10M
  ☆19Apr 3, 2023Updated 2 years ago
• suisuisi / gamegirl

  View on GitHub
  fpga based nes box
  ☆32Nov 9, 2021Updated 4 years ago
• antmicro / openssd-nvme

  View on GitHub
  ☆35Mar 10, 2021Updated 4 years ago
• ntpt7921 / Verilog_UDP_TCP

  View on GitHub
  Module giải mã và đóng gói cho các giao thức IP/TCP+UDP. Viết bằng Verilog. Đề tài thực hiện cho Đồ án thiết kế luận lý.
  ☆13Jan 3, 2022Updated 4 years ago
• SeanZarzycki / openSPARC-FPU

  View on GitHub
  ASIC Design of the openSPARC Floating Point Unit
  ☆15Mar 13, 2017Updated 8 years ago
• ajackevic / ELEC5882

  View on GitHub
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆33Aug 7, 2021Updated 4 years ago
• mcjtag / bitonic_sorter

  View on GitHub
  Bitonic sorter (Batcher's sorting network) written in Verilog.
  ☆37Oct 4, 2024Updated last year
• takeshineshiro / fpga_fibre_scan

  View on GitHub
  本信号处理板主要由FPGA芯片和CYUSB3.0 芯片组成,其中FPGA模块主要完成与相关外设的交互，CYUSB3.0主要完成协议数据的传输。 2.2.1 FPGA模块 处理流程： 1. 链路初始化： 在上位机完成USB固件的下载，并读取…
  ☆29Nov 9, 2015Updated 10 years ago
• DawnCarol / OpenC910_Modified

  View on GitHub
  commit rtl and build cosim env
  ☆15Feb 15, 2024Updated 2 years ago
• suisuisi / FPGA

  View on GitHub
  FPGA
  ☆129Apr 1, 2020Updated 5 years ago
• chinkwo / FPGA-multiboot

  View on GitHub
  通过SPI协议实现FPGA multiboot在线升级功能
  ☆13May 17, 2018Updated 7 years ago
• hellgate202 / crc_calc

  View on GitHub
  Simple and effective parallel CRC calculator written in synthesizable SystemVerilog
  ☆15Apr 11, 2019Updated 6 years ago
• hukenovs / adc_configurator

  View on GitHub
  ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
  ☆13Aug 29, 2018Updated 7 years ago
• mbuesch / crcgen

  View on GitHub
  Generator for CRC HDL code (VHDL, Verilog, MyHDL)
  ☆43Oct 13, 2023Updated 2 years ago
• yedk / arm_cortex_m0_xillinx

  View on GitHub
  基于arm cortex-m0内核的xillinx fpga sopc工程项目
  ☆13May 28, 2019Updated 6 years ago
• Starrynightzyq / ZYNQ-PYNQ-Z2-Gobang

  View on GitHub
  2018第二届全国大学生FPGA创新设计邀请赛的作品
  ☆63Dec 21, 2018Updated 7 years ago
• CospanDesign / verilog_ppfifo_demo

  View on GitHub
  Simple demo showing how to use the ping pong FIFO
  ☆16May 2, 2016Updated 9 years ago
• suisuisi / KnowledgeGraphofFPGA

  View on GitHub
  Knowledge Graph of FPGA
  ☆14Aug 21, 2021Updated 4 years ago
• luinaudt / deparser

  View on GitHub
  ☆16Dec 16, 2021Updated 4 years ago
• suisuisi / FPGAandStudy

  View on GitHub
  帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目
  ☆37Apr 17, 2022Updated 3 years ago