luyixdu / ZYNQ_ov5640_hdmi_frame_differenceLinks
帧差法运动目标检测,基于ZYNQ7020
☆70Updated 4 years ago
Alternatives and similar repositories for ZYNQ_ov5640_hdmi_frame_difference
Users that are interested in ZYNQ_ov5640_hdmi_frame_difference are comparing it to the libraries listed below
Sorting:
- fpga跑sobel识别算法☆38Updated 4 years ago
- 2022年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛紫光同创赛道视频色度亮度提取赛题设计源文件☆34Updated 2 years ago
- FPGA实现简单的图像处理算法☆48Updated 2 years ago
- 车牌识别,FPGA,2019全国大学生集成电路创新创业大赛☆142Updated 5 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆48Updated 5 years ago
- 本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛(高云赛道)项目,题目基于高云FPGA的多路网络视频监控编码系统。☆48Updated last year
- 2023集创赛紫光同创杯一等奖项目☆119Updated last year
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆80Updated 4 years ago
- 基于FPGA进行车牌识别☆79Updated last year
- image processing based FPGA☆110Updated 3 years ago
- FPGA☆126Updated 5 years ago
- 2018第二届全国大学生FPGA创新设计邀请赛的作品☆60Updated 6 years ago
- 2024年全国大学生嵌入式芯片与系统设计竞赛 FPGA创新设计赛道 国一+易灵思创新杯获奖作品 Ultra-Vision (基于Ti60F225的无极缩放算法实现)☆68Updated 4 months ago
- 本工程使用纯verilog编写rtl代码,在FPGA上搭建神经网络LeNet-5,实现手写数字识别的功能。☆26Updated 8 months ago
- FPGA图像处理仿真平台☆26Updated 3 years ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆115Updated 2 years ago
- 这是我所开发的两个项目,包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统☆93Updated 7 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆339Updated 2 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆202Updated last year
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆190Updated 9 months ago
- MNIST using tensorflow, c++ and fpga (zynq7010)☆25Updated 2 years ago
- 第八届集创赛紫光同创杯国二FPGA部分☆22Updated 10 months ago
- 一个开源的FPGA神经网络加速器。☆170Updated last year
- 基于FPGA的三速以太网UDP协议栈设计☆27Updated last year
- Zynq/FPGA实现CNN手写数字(0-9)识别☆33Updated 7 months ago
- The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…☆41Updated last year
- 基于安路开发板的bayer视频简单处理☆17Updated last year
- Bilinear interpolation realizes image scaling based on FPGA☆27Updated 5 years ago
- Constrast limited adaptive histogram equlization based on Verilog☆34Updated 2 years ago
- A novel architectural design for stitching video streams in real-time on an FPGA.☆125Updated 3 years ago