malkadi / FGPU_IPython
☆23Updated 6 years ago
Alternatives and similar repositories for FGPU_IPython
Users that are interested in FGPU_IPython are comparing it to the libraries listed below
Sorting:
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆40Updated 3 years ago
- Caffe to VHDL☆67Updated 4 years ago
- Generic FIFO implementation with optional FWFT☆57Updated 4 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆20Updated 7 years ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆33Updated 6 years ago
- FGPU is a soft GPU architecture general purpose computing☆57Updated 4 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆104Updated 7 years ago
- verilog CNN generator for FPGA☆34Updated 4 years ago
- Basic floating-point components for RISC-V processors☆65Updated 5 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- ☆83Updated 4 years ago
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆51Updated 3 years ago
- Adding PR to the PYNQ Overlay☆17Updated 8 years ago
- IP operations in verilog (simulation and implementation on ice40)☆55Updated 5 years ago
- Template for projects using the Hwacha data-parallel accelerator☆34Updated 4 years ago
- EE 260 Winter 2017: Advanced VLSI Design☆62Updated 8 years ago
- Verilog Convolutional Neural Network on PYNQ☆28Updated 7 years ago
- ☆65Updated 3 years ago
- CNN accelerator☆27Updated 7 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆51Updated 6 years ago
- RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards☆101Updated 6 years ago
- Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).☆58Updated 2 years ago
- Tutorial for integrating PyMTL and Vivado HLS☆18Updated 9 years ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆29Updated 9 years ago
- Synopsys Design compiler, VCS and Tetra-MAX☆17Updated 6 years ago
- ☆46Updated 5 years ago
- Python FIR Filter Package for Xilinx Pynq Board☆29Updated 7 years ago
- openHMC - an open source Hybrid Memory Cube Controller☆48Updated 9 years ago
- Verilog library for implementing neural networks.☆26Updated 10 years ago