kwonalbert / oram_fpga
FPGA related files for ORAM
☆12Updated 9 years ago
Alternatives and similar repositories for oram_fpga:
Users that are interested in oram_fpga are comparing it to the libraries listed below
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated 5 months ago
- ☆15Updated last year
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆30Updated 3 years ago
- Tutorial for integrating PyMTL and Vivado HLS☆17Updated 8 years ago
- ☆57Updated last year
- ☆15Updated 3 years ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆23Updated last year
- Recursive unified ORAM☆14Updated 9 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆40Updated 4 years ago
- A polyhedral compiler for hardware accelerators☆55Updated 6 months ago
- CGRA framework with vectorization support.☆21Updated this week
- DASS HLS Compiler☆27Updated last year
- HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair (ASPLOS 2022)☆17Updated 4 months ago
- Documentation for the entire CGRAFlow☆19Updated 3 years ago
- A multi-banked non-blocking cache that handles efficiently thousands of outstanding misses, especially suited for bandwidth-bound latency…☆18Updated 4 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆51Updated 4 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- Heterogeneous simulator for DECADES Project☆31Updated 8 months ago
- ☆17Updated 7 months ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- ☆27Updated 3 months ago
- CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.☆28Updated 11 months ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆13Updated 3 years ago
- Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…☆20Updated this week
- ☆18Updated 4 years ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆21Updated 2 weeks ago
- Artifact, reproducibility, and testing utilites for gem5☆21Updated 3 years ago
- ☆26Updated 7 years ago
- ILA Model Database☆22Updated 4 years ago