kwonalbert / oram_fpgaLinks
FPGA related files for ORAM
☆14Updated 10 years ago
Alternatives and similar repositories for oram_fpga
Users that are interested in oram_fpga are comparing it to the libraries listed below
Sorting:
- ☆20Updated last year
- Virtualized Accelerator Orchestration for Multi-Tenant Workloads☆19Updated last year
- DASS HLS Compiler☆29Updated 2 years ago
- ☆17Updated 3 years ago
- A Hardware Pipeline Description Language☆49Updated 7 months ago
- A fault-injection framework using Chisel and FIRRTL☆36Updated 4 months ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 3 years ago
- CGRA framework with vectorization support.☆43Updated 2 weeks ago
- Amazon F1-inspired Xilinx VCU118 hardware design framework☆13Updated 5 years ago
- ☆18Updated last month
- ILA Model Database☆24Updated 5 years ago
- CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.☆36Updated last year
- ☆19Updated last year
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆29Updated 3 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 4 years ago
- A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…☆23Updated last year
- Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.☆18Updated last week
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆53Updated 2 years ago
- Source code for the architectural and circuit-level simulators used for modeling the CROW (Copy-ROW DRAM) mechanism proposed in our ISCA …☆15Updated 6 years ago
- ☆87Updated last year
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆28Updated 7 months ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆44Updated 7 months ago
- The gem5-X open source framework (based on the gem5 simulator)☆42Updated 2 years ago
- Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…☆23Updated 3 weeks ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆36Updated last year
- Papers, Posters, Presentations, Documentation...☆19Updated 2 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated last year
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Updated 4 years ago
- ☆82Updated last year
- ☆29Updated 8 years ago