Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı
☆19May 27, 2023Updated 3 years ago
Alternatives and similar repositories for kasirga_gok_2023
Users that are interested in kasirga_gok_2023 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Kasırga Sayısal Görüntü İşleme Kategorisi Hızlandırıcı Tasarımı☆15May 27, 2023Updated 3 years ago
- KASIRGA - GUN | RV32IMCX☆12Aug 14, 2024Updated 2 years ago
- Repository for Hornet RISC-V Core☆21Sep 15, 2022Updated 3 years ago
- KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi☆157Jul 20, 2023Updated 3 years ago
- Bu depo TEKNOFEST 2023 Çip Tasarım Yarışması'nda Analog Tasarım ve Sayısal İşlemci Tasarımı kategorilerinde çeşitli dosyaları paylaşmak i…☆23Apr 13, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- VHDL ile Sayısal Tasarım ve FPGA Uygulamaları kitabı☆12May 30, 2025Updated last year
- ☆13Mar 25, 2022Updated 4 years ago
- Roadmap to become a Linux-Fine☆10Jul 13, 2024Updated 2 years ago
- Integration test of Verilog AXI modules (https://github.com/alexforencich/verilog-axi) with LiteX.☆17Dec 19, 2022Updated 3 years ago
- Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…☆32Mar 4, 2023Updated 3 years ago
- LEVEL: Open-source RV32IMC RISC-V processor core with pipelined microarchitecture, cache support, SoC peripherals and verification framew…☆31Jul 6, 2026Updated last month
- 6-stage dual-issue in-order superscalar risc-v cpu☆15Updated this week
- 2d laser scan data to 3d point cloud☆11Feb 10, 2022Updated 4 years ago
- An implementation of 5-stages RISC-V CPU☆12Jul 22, 2022Updated 4 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- DSP University Project - Matlab, Simulations, and Verilog Files☆14Jan 14, 2020Updated 6 years ago
- 64-bit RISC-V processor☆18Nov 30, 2022Updated 3 years ago
- ☆17Jul 10, 2025Updated last year
- Basic floating-point components for RISC-V processors☆12Aug 13, 2017Updated 9 years ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆19Updated this week
- RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS☆13Aug 26, 2024Updated last year
- 64QAM Wireless communication on ADALM-PLUTO (a SDR active learning module), written in MATLAB, based on some APIs and existing functions.☆18Jul 4, 2023Updated 3 years ago
- CPUs☆17Dec 21, 2020Updated 5 years ago
- Matrak Verilog ile yazılmış bir RISC-V işlemcidir.☆11May 8, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A Docker image for Mentor/Siemens Questa☆13Sep 26, 2023Updated 2 years ago
- BER vs. SNR for OFDM system with BPSK modulation☆10Apr 9, 2015Updated 11 years ago
- Solve one design problem each day for a month☆56Feb 3, 2023Updated 3 years ago
- Implementation of BPSK QPSK ASK and FSK☆16Aug 7, 2020Updated 6 years ago
- Emotiv connector for Matlab☆15Dec 11, 2020Updated 5 years ago
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆13Jul 14, 2024Updated 2 years ago
- ☆21Oct 14, 2023Updated 2 years ago
- Docker image generation for Xilinx Petalinux Tools and Vivado☆17Oct 10, 2025Updated 10 months ago
- ☆17Jan 13, 2024Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- RV32I Implementation on TangNano9K☆12Dec 24, 2022Updated 3 years ago
- TPC-DS Generation, Execution and Analyzer for Postgres☆20Dec 6, 2022Updated 3 years ago
- SystemVerilog RTL Linter for YoSys☆24Nov 22, 2024Updated last year
- VS Code extension that exposes Google Antigravity models to Copilot Chat using the official BYOK interface. Manages a local OpenAI-compat…☆16Jan 19, 2026Updated 7 months ago
- Accelerating a Classic 3D Video Game (The DOOM) on Heterogeneous Reconfigurable MPSoCs☆21Jun 4, 2020Updated 6 years ago
- A template-based, layer-oriented High Level Synthesis Tool for AI algorithms☆15Jul 20, 2026Updated last month
- This is a SpyDrNet Plugin for a physical design related transformations☆16May 18, 2026Updated 3 months ago