yusfux / KASIRGA-GUNLinks
KASIRGA-GUN | RV32IMCX
☆11Updated 11 months ago
Alternatives and similar repositories for KASIRGA-GUN
Users that are interested in KASIRGA-GUN are comparing it to the libraries listed below
Sorting:
- Bu depo TEKNOFEST 2023 Çip Tasarım Yarışması'nda Analog Tasarım ve Sayısal İşlemci Tasarımı kategorilerinde çeşitli dosyaları paylaşmak i…☆20Updated 2 years ago
- Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı☆17Updated 2 years ago
- SystemVerilog Tutorial☆159Updated 2 months ago
- ☆12Updated 3 months ago
- This repo provide an index of VLSI content creators and their materials☆152Updated 10 months ago
- 100 Days of RTL☆383Updated 11 months ago
- Welcome to the 108 RTL Projects repository! This collection aims to provide a comprehensive set of RTL design projects ranging from simpl…☆17Updated 6 months ago
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆19Updated last month
- ☆161Updated 2 years ago
- SystemVerilog derslerinde yazdığım kodları içermektedir.☆14Updated last year
- Verilog HDL files☆146Updated last year
- opensource EDA tool flor VLSI design☆33Updated last year
- This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim to…☆19Updated last year
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆62Updated 2 years ago
- ☆17Updated last year
- ☆113Updated last year
- Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedd…☆133Updated last month
- ☆20Updated last year
- "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado☆83Updated 2 years ago
- Implementation of RISC-V RV32I☆19Updated 2 years ago
- 64-bit RISC-V processor☆16Updated 2 years ago
- Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …☆259Updated last month
- ☆33Updated last year
- ☆46Updated 4 years ago
- 5 Day TCL begginer to advanced training workshop by VSD☆17Updated last year
- cadence flow for genus and innovus with UPF added.☆11Updated 4 years ago
- Lecture about FIR filter on an FPGA☆12Updated last year
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆24Updated last year
- Source code repo for UVM Tutorial for Candy Lovers☆192Updated 8 years ago
- A Single Cycle Risc-V 32 bit CPU☆48Updated 2 years ago