CMU-SAFARI / SiMRA-DRAMView external linksLinks
Source code & scripts for experimental characterization and demonstration of 1) simultaneous many-row activation, 2) up to nine-input majority operations and 3) copying one row's content to up 31 rows in real DDR4 DRAM chips. Described in our DSN'24 paper by Yuksel et al. at https://arxiv.org/abs/2405.06081
☆11May 17, 2024Updated last year
Alternatives and similar repositories for SiMRA-DRAM
Users that are interested in SiMRA-DRAM are comparing it to the libraries listed below
Sorting:
- Source code for the architectural simulator used for modeling the PUD system proposed in our HPCA 2024 paper `MIMDRAM: An End-to-End Proc…☆28Sep 12, 2025Updated 5 months ago
- Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of th…☆14Sep 24, 2020Updated 5 years ago
- New RowHammer mitigation mechanism that is area-, performance-, and energy-efficient especially at very low (e.g., 125) RowHammer thresho…☆17May 2, 2024Updated last year
- pLUTo is a DRAM-based Processing-using-Memory architecture that leverages the high density of DRAM to enable the massively parallel stori…☆18Jan 12, 2023Updated 3 years ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆19Mar 30, 2025Updated 10 months ago
- DRAM Bender is the first open source DRAM testing infrastructure that can be used to easily and comprehensively test state-of-the-art HBM…☆109Aug 10, 2025Updated 6 months ago
- Simulator for LLM inference on an abstract 3D AIMC-based accelerator☆25Sep 18, 2025Updated 4 months ago
- ARTICo³ - Dynamic and Partially Reconfigurable Architecture for Run-Time Adaptive, High Performance Embedded Computing☆12Sep 10, 2024Updated last year
- BRISKI ( Barrel RISC-V for Kilo-core Implementations ) is a fast and compact RISC-V barrel processor core that emphasize high throughput …☆29Nov 28, 2025Updated 2 months ago
- A robust, open-source physical layer implementation for FPGA-to-FPGA communication over high-speed serial links of the Quantum Error Corr…☆26Updated this week
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆56Jul 22, 2025Updated 6 months ago
- Hyperdimensional computing for language recognition: Matlab and RTL implementations☆36Jan 28, 2017Updated 9 years ago
- ☆11Mar 14, 2023Updated 2 years ago
- A tool designed to compare energy and emission costs between computer chips☆13Dec 9, 2023Updated 2 years ago
- Source code for the software implementations of the GenASM algorithms proposed in our MICRO 2020 paper: Senol Cali et. al., "GenASM: A Hi…☆32Dec 19, 2022Updated 3 years ago
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆53Sep 1, 2025Updated 5 months ago
- PIMeval simulator and PIMbench suite☆44Nov 22, 2025Updated 2 months ago
- VASim is a virtual homogeneous non-deterministic finite automata automata simulator and transformation tool. VASim can parse, transform, …☆36May 17, 2024Updated last year
- Programmatically generated PCB libraries facilitating robust electronic product design.☆17Dec 15, 2025Updated 2 months ago
- Medium Access Control layer of 802.15.4☆13Nov 14, 2014Updated 11 years ago
- RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS☆11Aug 26, 2024Updated last year
- Automated UVM testbench generator from Verilog RTL with optional LLM integration for advanced logic creation.☆17Oct 21, 2025Updated 3 months ago
- A scheduler to manage a multi tool dual arm robot while avoiding arm-to-arm collisions; considering complex side constraints; and optimiz…☆11Jul 6, 2021Updated 4 years ago
- A MIPS CPU with dual-issue, out-of-order, and 5-stage pipelines☆11Nov 28, 2019Updated 6 years ago
- Harnessing FABRIC for Scalable Human Genome Sequence Analysis☆12Feb 7, 2026Updated last week
- YosysHQ SVA AXI Properties☆44Feb 7, 2023Updated 3 years ago
- photonSDI - an open source SDI core☆10May 26, 2021Updated 4 years ago
- research, experimentation and implementation of hardware-agnostic accelerated DL framework☆38Aug 31, 2025Updated 5 months ago
- Wishbone bridge over SPI☆11Nov 13, 2019Updated 6 years ago
- PCIe to .1 inch header breakout☆11Sep 14, 2020Updated 5 years ago
- ☆11May 30, 2024Updated last year
- 基于ROS框架的 Ikid Robot 仿人足球机器人项目。功能包包括 gazebo仿真环境、机器人运动控制、步态调试服务端等。☆10Dec 10, 2023Updated 2 years ago
- Class project for COMP-781, Robotics. This is a CUDA-based collision detector for motion planning.☆13Apr 29, 2019Updated 6 years ago
- ☆17Dec 16, 2025Updated last month
- ☆13Feb 8, 2021Updated 5 years ago
- North Carolina State University: ECE 745 : Project: LC3 Microcontroller Functional Verification using SystemVerilog☆11Jun 5, 2017Updated 8 years ago
- Remove steam DRM from linux binaries☆13May 10, 2019Updated 6 years ago
- A lightweight implementation of MPC and NMPC in C++ using Eigen3☆10Oct 27, 2023Updated 2 years ago
- Dual-core 16-bit RISC processor☆12Jul 21, 2024Updated last year