yaseensalah / Digital-Design-of-FIR-FilterLinks
Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Verilog RTL Design and Simulink Testing with .wav audio files.
☆29Updated 2 years ago
Alternatives and similar repositories for Digital-Design-of-FIR-Filter
Users that are interested in Digital-Design-of-FIR-Filter are comparing it to the libraries listed below
Sorting:
- FIR band-pass filter using Verilog HDL.☆12Updated 5 years ago
- LMS-Adaptive Filter implement using verilog and Matlab☆48Updated 9 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆10Updated 5 years ago
- FIR implemention with Verilog☆50Updated 6 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆48Updated 2 years ago
- Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.☆34Updated 5 years ago
- LMS sound filtering by Verilog☆43Updated 5 years ago
- Interface Protocol in Verilog☆51Updated 6 years ago
- Implementing Different Adder Structures in Verilog☆76Updated 6 years ago
- Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It …☆31Updated 5 years ago
- Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images☆66Updated 4 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Updated 6 years ago
- RTL Verilog library for various DSP modules☆93Updated 3 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆34Updated 7 years ago
- This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…☆61Updated 2 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68Updated 5 years ago
- ☆18Updated 3 years ago
- FFT implement by verilog_测试验证已通过☆60Updated 9 years ago
- SPI Master Core clone from OpenCores☆11Updated 12 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆63Updated 3 years ago
- PCIE 5.0 Graduation project (Verification Team)☆97Updated last year
- A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-freque…☆50Updated 6 years ago
- Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be eff…☆16Updated 4 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆76Updated 2 months ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆134Updated 4 years ago
- AXI Interconnect☆54Updated 4 years ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆32Updated 4 years ago
- The CORDIC algorithm implemented in Octave/MATLAB and Verilog☆32Updated 10 years ago
- SPI interface connect to APB BUS with Verilog HDL☆39Updated 4 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆24Updated 7 years ago