How to set up Xilinx Vivado for source control
☆108Sep 16, 2024Updated last year
Alternatives and similar repositories for vivado_setup
Users that are interested in vivado_setup are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 3D modeling projects implemented while learning & experimenting with FreeCAD☆13Jun 4, 2021Updated 5 years ago
- ☆11Apr 25, 2020Updated 6 years ago
- ☆27May 31, 2023Updated 3 years ago
- Sphinx extension for visual documentation of hardware written in HWT☆12Nov 12, 2025Updated 7 months ago
- Repository of Matlab tools for analysis of wireline signal integrity and transceiver simulation☆14Apr 25, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Sample minimal Vivado project for Parallella FPGA☆45May 15, 2016Updated 10 years ago
- Learn, share and collaborate on ASIC design using open tools and technologies☆12Dec 27, 2020Updated 5 years ago
- Rules for performing tasks related to FPGA development in Bazel.☆12Aug 12, 2021Updated 4 years ago
- This repository is a subset of UVVM with Utility library and BFMs, and is intended as a UVVM starting platform for thos who only need the…☆23Nov 28, 2025Updated 7 months ago
- SoC for muntjac☆13Jun 18, 2025Updated last year
- ☆10Aug 14, 2015Updated 10 years ago
- SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.☆31Sep 10, 2020Updated 5 years ago
- A Verilog Filelist parser in Rust☆11Mar 25, 2022Updated 4 years ago
- A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure☆17Nov 19, 2019Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- FPGA Assembly (FASM) Parser and Generator☆102Jul 25, 2022Updated 3 years ago
- The ISA specification for the ZiCondOps extension.☆19Mar 21, 2024Updated 2 years ago
- Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board☆18Apr 4, 2024Updated 2 years ago
- Notes on learning to solder and setting up an electronics lab☆26Jan 12, 2021Updated 5 years ago
- LowPower Arduino Countdown Timer☆11Aug 9, 2020Updated 5 years ago
- Dockerfile with Vivado for CI☆63Jun 26, 2017Updated 9 years ago
- ☆14Feb 7, 2020Updated 6 years ago
- ☆36Aug 19, 2020Updated 5 years ago
- VCD file viewer for Neovim☆15Feb 20, 2022Updated 4 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- APB master and slave developed in RTL.☆25Oct 25, 2025Updated 8 months ago
- Rust library for multi-file readahead / dropbehind☆14May 31, 2017Updated 9 years ago
- Paradox Game data file parser☆12Aug 7, 2020Updated 5 years ago
- Build an open source, extremely simple DMA.☆25Feb 17, 2019Updated 7 years ago
- Sample Code for “Sequential and Parallel Algorithms and Data Structures -- The Basic Toolbox” Book☆26Nov 11, 2017Updated 8 years ago
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆468Sep 13, 2024Updated last year
- HDL development environment on Nix.☆26Oct 23, 2024Updated last year
- ☆59Aug 2, 2022Updated 3 years ago
- A nicer HDL.☆98Apr 8, 2017Updated 9 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Verilog Ethernet components for FPGA implementation☆3,020Feb 27, 2025Updated last year
- ~ Implementation of LSTM ANN in FPGA with VHDL☆10Apr 9, 2026Updated 3 months ago
- ☆17Jan 24, 2024Updated 2 years ago
- dom-like layout for terminal applications☆13Dec 27, 2020Updated 5 years ago
- ☆75Updated this week
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆33Aug 20, 2022Updated 3 years ago
- Rust library for the i.MX RT1062 chip cound in the Teensy 4.0☆10Sep 10, 2019Updated 6 years ago