Alternatives and similar repositories for vivado_setup

Users that are interested in vivado_setup are comparing it to the libraries listed below

• YosysHQ / fpga-toolchain
  Multi-platform nightly builds of open source FPGA tools
  ☆299Updated 4 years ago
• enjoy-digital / liteeth
  Small footprint and configurable Ethernet core
  ☆272Updated last month
• chipsalliance / f4pga-examples
  Example designs showing different ways to use F4PGA toolchains.
  ☆282Updated last year
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆151Updated 3 weeks ago
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆320Updated last year
• f4pga / f4pga-arch-defs
  FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
  ☆299Updated this week
• minerva-cpu / minerva
  A 32-bit RISC-V soft processor
  ☆319Updated last month
• skordal / potato
  A simple RISC-V processor for use in FPGA designs.
  ☆283Updated last year
• hdl4fpga / hdl4fpga
  VHDL library 4 FPGAs
  ☆184Updated this week
• ZipCPU / vgasim
  A Video display simulator
  ☆174Updated 7 months ago
• gatecat / nextpnr-xilinx
  Experimental flows using nextpnr for Xilinx devices
  ☆252Updated last year
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆185Updated last year
• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆131Updated last year
• fusesoc / blinky
  Example LED blinking project for your FPGA dev board of choice
  ☆189Updated 3 weeks ago
• ghdl / ghdl-yosys-plugin
  VHDL synthesis (based on ghdl)
  ☆354Updated last week
• ZipCPU / dblclockfft
  A configurable C++ generator of pipelined Verilog FFT cores
  ☆251Updated last year
• enjoy-digital / litedram
  Small footprint and configurable DRAM core
  ☆462Updated 2 weeks ago
• olofk / corescore
  CoreScore
  ☆171Updated last month
• pieter3d / simview
  ☆88Updated 2 months ago
• timvideos / litex-buildenv
  An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!
  ☆219Updated 3 years ago
• litex-hub / fpga_101
  FPGA 101 lessons/labs
  ☆401Updated last year
• cambridgehackers / fpgamake
  Generates Makefiles to synthesize, place, and route verilog using Vivado
  ☆97Updated 3 years ago
• dawsonjon / Chips-2.0
  FPGA Design Suite based on C to Verilog design flow.
  ☆246Updated 6 years ago
• laforest / FPGADesignElements
  A self-contained online book containing a library of FPGA design modules and related coding/design guides.
  ☆458Updated last year
• hdl / awesome
  A curated list of awesome resources for HDL design and verification
  ☆166Updated last week
• cliffordwolf / PonyLink
  A single-wire bi-directional chip-to-chip interface for FPGAs
  ☆125Updated 9 years ago
• YosysHQ / prjtrellis
  Documenting the Lattice ECP5 bit-stream format.
  ☆436Updated 2 months ago
• enjoy-digital / litescope
  Small footprint and configurable embedded FPGA logic analyzer
  ☆198Updated 2 months ago
• PrincetonUniversity / prga
  Open-source FPGA research and prototyping framework.
  ☆210Updated last year
• SpinalHDL / SaxonSoc
  SoC based on VexRiscv and ICE40 UP5K
  ☆160Updated 9 months ago