jeffreyyu0602 / quantized-trainingLinks
☆29Updated this week
Alternatives and similar repositories for quantized-training
Users that are interested in quantized-training are comparing it to the libraries listed below
Sorting:
- ☆49Updated last month
- ☆107Updated last year
- Tender: Accelerating Large Language Models via Tensor Decompostion and Runtime Requantization (ISCA'24)☆20Updated last year
- ☆48Updated 4 years ago
- A co-design architecture on sparse attention☆51Updated 4 years ago
- [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning☆101Updated last year
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆29Updated last year
- Implementation of Microscaling data formats in SystemVerilog.☆23Updated last month
- [HPCA 2023] ViTCoD: Vision Transformer Acceleration via Dedicated Algorithm and Accelerator Co-Design☆115Updated 2 years ago
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆51Updated last year
- Official implementation of EMNLP'23 paper "Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference?"☆23Updated last year
- ViTALiTy (HPCA'23) Code Repository☆23Updated 2 years ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆51Updated 4 months ago
- PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training☆18Updated last year
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆62Updated 5 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆87Updated 4 months ago
- ☆78Updated last year
- ☆41Updated 2 weeks ago
- [TRETS 2025][FPGA 2024] FPGA Accelerator for Imbalanced SpMV using HLS☆14Updated this week
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆43Updated last year
- ☆178Updated last year
- ☆35Updated 5 years ago
- MICRO22 artifact evaluation for Sparseloop☆44Updated 3 years ago
- Simulator for BitFusion☆101Updated 5 years ago
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆89Updated last year
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆17Updated 5 months ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆146Updated 6 months ago
- Open-source of MSD framework☆16Updated last year
- ☆28Updated 4 months ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆40Updated 2 years ago