Alternatives and similar repositories for edgeboard:

Users that are interested in edgeboard are comparing it to the libraries listed below

• Reconfigurable-Computing / Xilinx-FPGA-PCIe-XDMA-Tutorial
  Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
  ☆22Updated 2 years ago
• WangXuan95 / FPGA-HDMI
  An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
  ☆46Updated 7 months ago
• Angelic47 / GowinDDR3_AXI4_SpinalHDL
  Gowin DDR3 Controller with AXI4 Implementation | 高云DDR3内存控制器AXI4接口实现
  ☆21Updated last year
• maswx / vu13p
  国产VU13P加速卡资料
  ☆63Updated last month
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆43Updated last year
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆36Updated 3 years ago
• TiferKing / ypcb_00338_1p1_hack
  YPCB-00338-1P1 Hack
  ☆19Updated 2 months ago
• Elrori / Delta-sigma-ADC-verilog
  Delta-sigma ADC,PDM audio FPGA Implementation
  ☆68Updated 2 years ago
• ganyunhan / DUAL-OV5640-for-GOWIN
  A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board
  ☆33Updated 3 years ago
• Aperture-Electronic / Realtime-Bicubic-16X-SuperResolution-IP
  APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS
  ☆22Updated last year
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆68Updated 3 years ago
• WangXuan95 / FPGA-QOI
  An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。
  ☆22Updated 5 months ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆70Updated 8 months ago
• thuCGRA / SpinalHDL_Chinese_Doc
  Translated SpinalHDL-Doc(v1.7.2) into Chinese
  ☆48Updated last year
• lulinchen / face_detect_open
  A Voila-Jones face detector hardware implementation
  ☆32Updated 6 years ago
• Chainsaw-Team / Chainsaw
  a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…
  ☆58Updated last year
• antmicro / nvme-verilog-pcie
  ☆53Updated 2 years ago
• opensmartnic / cocotb_primer
  understanding of cocotb （In Chinese Only）
  ☆15Updated last year
• xupsh / Pynq-CV-OV5640
  Pynq computer vision examples with an OV5640 camera
  ☆45Updated 4 years ago
• sunyata000 / PODES-M0O
  A VerilogHDL MCU Core based ARMv6 Cortex-M0
  ☆21Updated 5 years ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆41Updated last year
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆68Updated 9 months ago
• Frogwells / fpga_cmos_design
  这是使用FPGA开发CMOS的两个真实项目，之前的fpga_design仅是一个未完善的版本，同时也删除了一些与项目无关的东西
  ☆33Updated 7 years ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆84Updated last year
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago
• yportne13 / spinalAdderNetMNIST
  SpinalHDL AdderNet MNIST
  ☆11Updated 4 years ago
• BAO-Rongxin / Intelligent-BLDC-driver
  The project includes codes, specification, presentation and other information.
  ☆24Updated 4 years ago
• xiaotianbc / FPGA_XDMA_Demo
  a simple FPGA xdma demo based Memblaze
  ☆14Updated last year
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆63Updated 3 months ago
• circuitvalley / USB3_MIPI_CSI2_RX_V2_Crosslink_NX
  MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…
  ☆51Updated 2 weeks ago