Alternatives and similar repositories for Zybo-Z7-20-base-linux:

Users that are interested in Zybo-Z7-20-base-linux are comparing it to the libraries listed below

• Digilent / Petalinux-Zybo-Z7-20
  ☆52Updated 2 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆55Updated last year
• Cognoscan / AxiCores
  AXI4-Compatible Verilog Cores, along with some helper modules.
  ☆16Updated 4 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆39Updated 9 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆55Updated 4 years ago
• Digilent / Petalinux-Zybo
  ☆26Updated 6 years ago
• pulp-platform / axi_spi_slave
  ☆23Updated 3 years ago
• aignacio / riscv_verilator_model
  RISCV model for Verilator/FPGA targets
  ☆49Updated 5 years ago
• RoaLogic / Hamming-ECC
  Hamming ECC Encoder and Decoder to protect memories
  ☆29Updated 3 months ago
• jbush001 / PASC
  Parallel Array of Simple Cores. Multicore processor.
  ☆94Updated 5 years ago
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆79Updated 5 years ago
• damdoy / fpga_image_processing
  IP operations in verilog (simulation and implementation on ice40)
  ☆54Updated 5 years ago
• buttercutter / DDR
  A simple DDR3 memory controller
  ☆53Updated 2 years ago
• Digilent / Zybo-Z7-20-pcam-5c
  ☆54Updated 2 years ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆120Updated 2 years ago
• fpgadeveloper / ethernet-fmc-zynq-gem
  Example design for the Ethernet FMC using the hard GEMs of the Zynq
  ☆54Updated last month
• SymbioticEDA / MARLANN
  Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
  ☆86Updated 5 years ago
• Xilinx / PYNQ-Networking
  Networking Overlay on PYNQ
  ☆47Updated 5 years ago
• verilator / example-systemverilog
  ☆35Updated 11 months ago
• Xilinx / bootgen
  bootgen source code
  ☆37Updated 2 months ago
• Digilent / digilent-vivado-scripts
  ☆64Updated 6 months ago
• ZipCPU / dbgbus
  A collection of debugging busses developed and presented at zipcpu.com
  ☆37Updated last year
• westerndigitalcorporation / swerv_eh1_fpga
  FPGA reference design for the the Swerv EH1 Core
  ☆69Updated 5 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆39Updated 4 years ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆61Updated 4 years ago
• RoaLogic / ahb3lite_memory
  Multi-Technology RAM with AHB3Lite interface
  ☆21Updated 8 months ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆62Updated 2 weeks ago
• riscveval / Rocket-Chip
  ☆21Updated 7 years ago
• Xilinx / XilinxCEDStore
  This store contains Configurable Example Designs.
  ☆44Updated 3 weeks ago
• varunnagpaal / Digital-Hardware-Modelling
  Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
  ☆62Updated 4 years ago