This is a demo for still image compression application
☆14Apr 14, 2018Updated 8 years ago
Alternatives and similar repositories for xdcom
Users that are interested in xdcom are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A simple JPEG2000 hardware encoder☆25Sep 29, 2020Updated 5 years ago
- JPEG2000 compression coder on Xilinx Virtex 5 FPGA☆17Jul 17, 2013Updated 12 years ago
- Image processing on FPGA using verilog☆26Dec 5, 2022Updated 3 years ago
- ☆14Dec 17, 2015Updated 10 years ago
- FPGA工程合集-涉及图像、通信、接口、算法等,详见WIKI☆12Sep 7, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- implementing a Recurrent Neural Network with binarized weight format on FPGA☆22Sep 3, 2017Updated 8 years ago
- JPEG Encoder Verilog☆82Oct 31, 2022Updated 3 years ago
- This is a myhdl test environment for the open-cores jpeg_encoder.☆18Oct 23, 2016Updated 9 years ago
- IR image processing and demo on a Zybo Z7-20 using a Raspberry Pi night vision vamera☆13Aug 30, 2021Updated 4 years ago
- A MATLAB implementation of JPEG 2000 Part 1 and Part 15 (HTJ2K) that complies with the conformance testing defined in JPEG 2000 Part 4. T…☆15Apr 24, 2023Updated 2 years ago
- ☆19Sep 12, 2022Updated 3 years ago
- Verilog FPGA code : including experimental DSP audio processor☆13Dec 1, 2020Updated 5 years ago
- Knowledge Graph of FPGA☆14Aug 21, 2021Updated 4 years ago
- FIR,FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. …☆15Jan 19, 2018Updated 8 years ago
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码…☆314Sep 18, 2024Updated last year
- Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.☆31Apr 26, 2022Updated 3 years ago
- ☆13May 22, 2015Updated 10 years ago
- hdmi-ts Project☆13Jun 11, 2017Updated 8 years ago
- Unit testing for cocotb☆11Aug 6, 2023Updated 2 years ago
- ☆15Jun 7, 2022Updated 3 years ago
- Transmission of HDMI Signals over Spartan 6 - XC6SLX45 . Transmission of High-Definition Multimedia Interface (HDMI) and Digital Visual …☆13Feb 13, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A soft multimedia/graphics processor prototype in Chisel 3☆11May 3, 2023Updated 2 years ago
- Zedboard projects☆11May 15, 2016Updated 9 years ago
- This is the repository for a verilog implementation of a lzrw1 compression core☆19Dec 8, 2017Updated 8 years ago
- Language for simplifying parameterized RTL design☆13Apr 3, 2026Updated last week
- achieve softmax in PYNQ with heterogeneous computing.☆68Nov 1, 2018Updated 7 years ago
- ☆15Dec 1, 2022Updated 3 years ago
- FFT algorithm coded in Verilog. Designed to run on a Xillinx Spartan 6 FPGA board.☆15Jul 19, 2012Updated 13 years ago
- Identifies ASL Hand Gesture for numbers using image processing in verilog☆15May 3, 2012Updated 13 years ago
- This is a tool to login qq zone using python, with multithreads to scrapy what you want,such as, message, blogs board, and photos.☆10May 11, 2017Updated 8 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆14Jul 23, 2020Updated 5 years ago
- Translates the DSD/DSF file into WAV file written in C for learning,☆11Feb 21, 2019Updated 7 years ago
- Chips 2.0 Demo for Atlys Spartan 6 development platform. Web app using C to Verilog TCP/IP server.☆16Jan 10, 2018Updated 8 years ago
- Library of generic verilog buildingblocks☆17Dec 25, 2025Updated 3 months ago
- SVA examples and demonstration☆18Sep 8, 2020Updated 5 years ago
- ☆21Mar 30, 2023Updated 3 years ago
- ☆11Jul 4, 2016Updated 9 years ago