gillianGan / ahb_sram_masterLinks
☆19Updated 5 years ago
Alternatives and similar repositories for ahb_sram_master
Users that are interested in ahb_sram_master are comparing it to the libraries listed below
Sorting:
- IC Verification & SV Demo☆54Updated 3 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆127Updated 4 years ago
- 数字IC秋招项目、手撕代码☆35Updated last year
- AXI总线连接器☆99Updated 5 years ago
- This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…☆60Updated last year
- ahb scram controller, design and verification☆27Updated 7 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆61Updated 2 years ago
- Mirror of william_william/uvm-mcdf on Gitee☆23Updated 2 years ago
- An uvm verification env for ahb2apb bridge☆53Updated 4 years ago
- AXI DMA 32 / 64 bits☆113Updated 10 years ago
- AXI Interconnect☆49Updated 3 years ago
- System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment☆104Updated 5 months ago
- AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…☆172Updated 6 years ago
- ☆36Updated 9 years ago
- yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/☆120Updated 7 years ago
- work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework☆33Updated 2 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆42Updated 3 years ago
- ☆65Updated 9 years ago
- UVM AHB VIP☆86Updated 7 months ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆101Updated 7 years ago
- SPI interface connect to APB BUS with Verilog HDL☆31Updated 3 years ago
- Master and Slave made using AMBA AXI4 Lite protocol.☆26Updated 4 years ago
- a very simple risc_cpu verification demo with uvm☆24Updated 6 years ago
- UVM Testbench to verify serial transmission of data between SPI master and slave☆48Updated 4 years ago
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆91Updated last year
- VIP for AXI Protocol☆137Updated 3 years ago
- Radix-4 1024 point fft in verilog☆10Updated 5 years ago
- ARM中通过APB总线连接的UART模块☆67Updated 5 years ago
- Verification IP for APB protocol☆66Updated 4 years ago
- 支持AXI总线协议的8k×8 SP SRAM☆25Updated 5 years ago