RISC-V OpenWrt Port
☆17Oct 30, 2018Updated 7 years ago
Alternatives and similar repositories for riscv-openwrt-port
Users that are interested in riscv-openwrt-port are comparing it to the libraries listed below
Sorting:
- ☆13Nov 29, 2025Updated 3 months ago
- Porting OpenWrt to RISC-V - please check https://github.com/xfguo/riscv-openwrt-port for full instructions.☆54Nov 2, 2018Updated 7 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14May 1, 2020Updated 5 years ago
- ☆13Aug 22, 2022Updated 3 years ago
- Universal Advanced JTAG Debug Interface☆17May 10, 2024Updated last year
- Utilities for the ECP5 FPGA☆17Aug 5, 2021Updated 4 years ago
- ☆19Jun 26, 2021Updated 4 years ago
- Altium PCB project for the Titan PCI Express development card. This card uses the Lattice ECP5 FPGA.☆21Apr 8, 2015Updated 10 years ago
- ☆25Jan 16, 2019Updated 7 years ago
- Simple BASIC interpreter for Olimex RVPC (1€ PC)☆30Aug 7, 2025Updated 7 months ago
- Universal Verification Methodology (UVM) base libraries, with edits for Verilator☆31Oct 12, 2025Updated 4 months ago
- Linux kernel driver for Semtech SX127x FSK/OOK/LoRa transceivers☆28Feb 13, 2018Updated 8 years ago
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Jul 12, 2024Updated last year
- Development Kit☆33Apr 23, 2019Updated 6 years ago
- LoRa modulator implementation on Lattice ECP5 FPGA to interface with AT86RF215 I/Q Radio☆43Feb 20, 2025Updated last year
- Minimig for the DE1 board☆50Apr 18, 2022Updated 3 years ago
- SD card reader with STM32F1☆11Nov 10, 2018Updated 7 years ago
- MATLAB/Octave generator of Hamming ECC coding. Output format is Verilog HDL.☆12Dec 27, 2022Updated 3 years ago
- A robust, open-source physical layer implementation for FPGA-to-FPGA communication over high-speed serial links of the Quantum Error Corr…☆28Updated this week
- ☆10Oct 23, 2016Updated 9 years ago
- Master Thesis☆10Jan 28, 2023Updated 3 years ago
- Vim plugin for Bluespec SystemVerilog (BSV)☆11Nov 8, 2020Updated 5 years ago
- Single-axis solar position tracking prototype with a Cortex M0 MCU (Ardunio MKRZero)☆13Apr 13, 2020Updated 5 years ago
- Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language☆17Feb 20, 2019Updated 7 years ago
- Yocto Explorer: is a command line tool to ease the manipulation of files under the directory structure adopted by O.S. Systems to organiz…☆10Feb 23, 2022Updated 4 years ago
- Build a Kubernetes (K8s) cluster and configure the OAI 5G core network and UERANSIM GNB + UEs on it☆10Nov 10, 2025Updated 3 months ago
- MD5 core in verilog☆13May 1, 2012Updated 13 years ago
- An 8-bit soft processor in VHDL☆13Apr 21, 2017Updated 8 years ago
- RADIX-4 SRT division☆12Oct 31, 2019Updated 6 years ago
- Port of MIT's xv6 OS to 32 bit RISC V☆44Jun 13, 2022Updated 3 years ago
- Library for using the Modern Device Pulse Sensor and Proximity Sensor☆20Mar 9, 2017Updated 9 years ago
- ChibiOS blink with stable 16.1.5☆10Nov 21, 2016Updated 9 years ago
- A 68HC11 SBC for the 68HC11A CPUs☆12Mar 8, 2023Updated 3 years ago
- Reproduction PCB of the Ferguson "Big Board" Z80 SBC from 1980☆13Feb 28, 2025Updated last year
- Z80 CPU + UART + Timer + I/O Ports coded in VHDL and implemented for the Lattice iCE40-hx8k dev board☆10Aug 10, 2016Updated 9 years ago
- Source code for my retro video game, Toorum's Quest II running on The Box, Arduino based video game console.☆10Nov 23, 2013Updated 12 years ago
- KiCad RF Stuff☆14Aug 17, 2021Updated 4 years ago
- Post-Silicon Validation Tool based on REVERSI☆12Dec 10, 2025Updated 2 months ago
- ☆14Feb 6, 2024Updated 2 years ago