DOUDIU / Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-AlgorithmLinks
The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.
☆56Updated last year
Alternatives and similar repositories for Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-Algorithm
Users that are interested in Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-Algorithm are comparing it to the libraries listed below
Sorting:
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆364Updated 2 years ago
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆263Updated last year
- 2023集创赛紫光同创杯一等奖项目