The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.
☆64Jun 11, 2024Updated 2 years ago
Alternatives and similar repositories for Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-Algorithm
Users that are interested in Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-Algorithm are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Constrast limited adaptive histogram equlization based on Verilog☆41Jul 21, 2023Updated 2 years ago
- 2024嵌赛FPGA紫光同创赛题三——PixelFuze☆13May 19, 2026Updated 3 weeks ago
- 本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。☆70Dec 11, 2023Updated 2 years ago
- The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…☆48Apr 22, 2024Updated 2 years ago
- Zynq/FPGA实现CNN手写数字(0-9)识别☆41Dec 14, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated last year
- FPGA图像处理仿真平台☆31Apr 25, 2022Updated 4 years ago
- 基于verilog实现了ISP图像处理IP☆329Nov 28, 2022Updated 3 years ago
- The MEISHA V100 contains four 64-bit RISC-V RV64GC，a 5-stage in-order scalar pipeline, comprehensive peripherals and interfaces. The syst…☆20Feb 2, 2026Updated 4 months ago
- 机器人使用了Xilinx的SPARTAN-6系列芯片以及ISE设计工具对机器人控制电路进行了设计和仿真，验证了电路的正确性和可靠性。同时机器人使用了温湿度传感器、人体感应传感器、超声波传感器、震动传感器、有毒气体传感器等，可以对灾区的环境和受困人员进行多方面的检测和响应。还…☆11Nov 15, 2023Updated 2 years ago
- 一个基于AXI接口的PL端卷积加速器，可由PS端调用☆12Apr 15, 2023Updated 3 years ago
- 基于FPGA-Pynq的车牌识别系统。The LPR system of FPGA-Pynq☆13Mar 22, 2019Updated 7 years ago
- Efficient FPGA-Based Accelerator for Convolutional Neural Networks☆60Jul 31, 2024Updated last year
- video stream scaler based on FPGA and verilog☆18Mar 28, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This open-source repository aims to stitch several separate video streams into a single video using DDR3/4 storage via the AXI interface.…☆21Oct 28, 2024Updated last year
- ☆23Mar 25, 2023Updated 3 years ago
- fpga跑sobel识别算法☆48Mar 15, 2021Updated 5 years ago
- All You Need to Know About QDMA☆20Jun 30, 2023Updated 2 years ago
- 开发环境是Windows 10, Quartus。硬件开发语言是Verilog。 利用FPGA开发的智能小车，分为两个部分，控制器部分和小车部分，通过蓝牙信号进行连接。 控制部分可以通过加速度传感器检测手势，从而控制小车的前后左右。 加速度传感器还可以检测人体是否摔倒…☆14Mar 10, 2019Updated 7 years ago
- FPGA实现动态图像识别☆24Jul 31, 2020Updated 5 years ago
- ☆11Feb 7, 2023Updated 3 years ago
- Use OpenCV DNN module to load Tiny Yolov3 weights and cfg files for detection.☆12Jul 14, 2019Updated 6 years ago
- ☆13Jun 20, 2023Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆281Apr 1, 2024Updated 2 years ago
- 基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）☆53Apr 23, 2020Updated 6 years ago
- ☆10Dec 12, 2020Updated 5 years ago
- OscillatorIMP ecosystem FPGA IP sources☆28Feb 22, 2026Updated 3 months ago
- 仅注册一个邮箱，实现Cursor无限账号注册☆13Jul 2, 2025Updated 11 months ago
- 第八届集创赛紫光同创杯音频处理国家二等奖☆26Oct 15, 2024Updated last year
- Control a MIPI Camera over I2C☆22Jun 21, 2020Updated 5 years ago
- hardware design of universal NPU(CNN accelerator) for various convolution neural network☆174Mar 5, 2025Updated last year
- ☆16Oct 25, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog Implementation of Otsu's algorithm☆14Jan 18, 2020Updated 6 years ago
- ISP☆13Nov 25, 2023Updated 2 years ago
- This is hardware logic code for an event-based MLP denoising filter.☆24Apr 6, 2025Updated last year
- Applying various image enhancement algorithms on Night Vision IR images using Xilinx Vivado☆16Oct 27, 2023Updated 2 years ago
- Awesome Skills from Around the World☆178Updated this week
- ☆16Mar 2, 2021Updated 5 years ago
- 代码在这个库里 Code is here☆67Jan 28, 2026Updated 4 months ago