Alternatives and similar repositories for ctucanfd_ip_core

Users that are interested in ctucanfd_ip_core are comparing it to the libraries listed below

• Logic-Design-Services / CTU-CAN-FD
  CAN FD IP Core in VHDL
  ☆38Updated last week
• PCB-Arts / zynq-feather
  Zynq-Feather brings the power of a Xilinx Zynq SoC (ARM + FPGA) into the compact Adafruit Feather form factor — enabling modular, high-pe…
  ☆49Updated 4 years ago
• olegv142 / STM32AllProgrammable
  STM32F407 + Spartan6 combo with high speed USB TMC interface
  ☆30Updated 5 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆48Updated 5 years ago
• opalkelly-opensource / design-resources
  A collection of Opal Kelly provided design resources
  ☆17Updated 3 months ago
• hdl-util / mipi-csi-2
  Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA
  ☆73Updated 5 years ago
• BerkeleyLab / XVC-FTDI-JTAG
  Xilinx virtual cable server for generic FTDI 4232H.
  ☆60Updated 2 years ago
• antmicro / kria-k26-devboard
  Open source AMD Xilinx Kria UltraScale+ SoM baseboard
  ☆67Updated last year
• FMCHUB / Lib_Altium
  Altium Designer libraries for ANSI/VITA 57 FPGA Mezzanine Card (FMC) Standard
  ☆45Updated 4 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆24Updated 8 years ago
• Gekkio / docker-fpga
  Dockerized FPGA toolchain experiments
  ☆29Updated 2 years ago
• bggardner / can-lite-vhdl
  A lightweight Controller Area Network (CAN) controller in VHDL
  ☆30Updated last year
• fcayci / vhdl-axis-uart
  UART to AXI Stream interface written in VHDL
  ☆18Updated 3 years ago
• MasterPlayer / rmii-ethernet-mac
  RMII interface ethernet MAC Core for 10/100 MBit ethernet implementation with support CDC and AXI-Stream BUS without management and witho…
  ☆12Updated 4 years ago
• raczben / zynq_flash
  QSPI flash support for Xilinx's Zynq devices
  ☆25Updated 5 years ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• hVHDL / hVHDL_example_project
  An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…
  ☆30Updated last year
• siorpaes / SimpleSoC
  Very simple Cortex-M1 SoC design based on ARM DesignStart
  ☆17Updated 4 years ago
• imrickysu / ZYNQ-Custom-Board-Bring-Up-Guide
  This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…
  ☆72Updated 8 years ago
• johnathan-convertino-afrl / open1553
  Projects for building MIL-STD-1553 communications devices
  ☆30Updated last year
• viktor-nikolov / Zynq-XADC-DMA-lwIP
  Tutorial for analog input digitalization by the Xilinx Zynq XADC utilizing the DMA and data streaming to a PC over the network.
  ☆30Updated 4 months ago
• esynr3z / adc-eval
  📊 Tools collection (NumPy + Matplotlib based) to do spectral analysis and calculate the key performance parameters of an ADC
  ☆23Updated 2 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆40Updated 11 months ago
• geddy11 / netwiz
  Network protocol libraries for VHDL test benches
  ☆13Updated last month
• VideoGPU / FMC_MIPI
  FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface
  ☆20Updated 2 years ago
• lnls-dig / general-cores
  general-cores
  ☆21Updated 6 months ago
• analogdevicesinc / testbenches
  Testbenches for HDL projects
  ☆22Updated this week
• TI-Bonn / vercolib_pcie
  VHDL PCIe Transceiver
  ☆32Updated 5 years ago
• MorrisMA / 1PPS-DPLL
  DPLL for phase-locking to 1PPS signal
  ☆34Updated 9 years ago
• davemuscle / sigma_delta_converters
  Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
  ☆78Updated 3 years ago