parsa-epfl / HBFPEmulator
ColTraIn HBFP Training Emulator
☆16Updated 2 years ago
Alternatives and similar repositories for HBFPEmulator:
Users that are interested in HBFPEmulator are comparing it to the libraries listed below
- EQueue Dialect☆40Updated 3 years ago
- A Language for Closed-form High-level ARchitecture Modeling☆20Updated 5 years ago
- research, experimentation and implementation of hardware-agnostic accelerated DL framework☆36Updated last month
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆23Updated 3 months ago
- ☆13Updated last year
- Chameleon: Adaptive Code Optimization for Expedited Deep Neural Network Compilation☆27Updated 5 years ago
- This is the implementation for paper: AdaTune: Adaptive Tensor Program CompilationMade Efficient (NeurIPS 2020).☆13Updated 3 years ago
- A Generic Distributed Auto-Tuning Infrastructure☆22Updated 3 years ago
- Accelerator simulation framework using nn_dataflow traces and energy, etc. post-processing☆7Updated 6 years ago
- ☆21Updated last month
- ☆24Updated 5 years ago
- ☆23Updated 3 months ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆49Updated 6 years ago
- Thinking is hard - automate it☆19Updated 2 years ago
- ☆35Updated 3 years ago
- agile hardware-software co-design☆47Updated 3 years ago
- ☆15Updated 3 years ago
- Official implementation of "Searching for Winograd-aware Quantized Networks" (MLSys'20)☆27Updated last year
- ☆17Updated 4 years ago
- ☆33Updated 3 years ago
- Stencil with Optimized Dataflow Architecture Compiler☆16Updated 4 years ago
- GEMM and Winograd based convolutions using CUTLASS☆26Updated 4 years ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆55Updated 3 years ago
- Modified version of PyTorch able to work with changes to GPGPU-Sim☆51Updated 2 years ago
- The code for our paper "Neural Architecture Search as Program Transformation Exploration"☆18Updated 3 years ago
- Benchmark for matrix multiplications between dense and block sparse (BSR) matrix in TVM, blocksparse (Gray et al.) and cuSparse.☆24Updated 4 years ago
- Fast matrix multiplication for few-bit integer matrices on CPUs.☆27Updated 6 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 3 years ago
- Low Precision Arithmetic Simulation in PyTorch - extension for posit and beyond☆13Updated last year
- This repo is to collect the state-of-the-art GNN hardware acceleration paper☆54Updated 3 years ago