Alternatives and similar repositories for riscv-tomthumb

Users that are interested in riscv-tomthumb are comparing it to the libraries listed below

• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆53Updated 3 years ago
• ZipCPU / s6soc
  CMod-S6 SoC
  ☆42Updated 7 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 6 months ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆22Updated 6 years ago
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆69Updated 3 years ago
• rsnikhil / RISCV_Piccolo_v1
  Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).
  ☆34Updated 9 years ago
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 9 years ago
• haojunliu / OpenFPGA
  OpenFPGA
  ☆34Updated 7 years ago
• olgirard / openmsp430
  The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
  ☆65Updated 7 years ago
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆64Updated 6 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆107Updated 10 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆62Updated 6 years ago
• Paebbels / PicoBlaze-Library
  The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…
  ☆36Updated 4 years ago
• torc-isi / torc
  Torc: Tools for Open Reconfigurable Computing
  ☆39Updated 8 years ago
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆47Updated 5 years ago
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆83Updated last year
• lawrie / tiny_usb_examples
  Using the TinyFPGA BX USB code in user designs
  ☆51Updated 6 years ago
• cliffordwolf / PonyLink
  A single-wire bi-directional chip-to-chip interface for FPGAs
  ☆123Updated 9 years ago
• hamsternz / FPGA_GigabitTx
  Sending UDP packets out over a Gigabit PHY with an FPGA.
  ☆42Updated 9 years ago
• VLSI-EDA / PoC-Examples
  This repository contains synthesizable examples which use the PoC-Library.
  ☆38Updated 4 years ago
• ObKo / USBCore
  USB Full-Speed/Hi-Speed Device Controller core for FPGA
  ☆32Updated 4 years ago
• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆132Updated last year
• EvgenyMuryshkin / QuokkaEvaluation
  Example projects for Quokka FPGA toolkit
  ☆37Updated 2 years ago
• rbarzic / nanorv32
  A small 32-bit implementation of the RISC-V architecture
  ☆32Updated 5 years ago
• pliu6 / vhd2vl
  vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.
  ☆26Updated 9 years ago
• bwitherspoon / rv32cpu
  A RISC-V processor
  ☆15Updated 6 years ago
• chiggs / oc_jpegencode
  Fork of OpenCores jpegencode with Cocotb testbench
  ☆47Updated 10 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆80Updated 5 years ago
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆23Updated last year