Alternatives and similar repositories for fpga-virtual-console:

Users that are interested in fpga-virtual-console are comparing it to the libraries listed below

• rgwan / bapi-rv32i
  A extremely size-optimized RV32I soft processor for FPGA.
  ☆27Updated 6 years ago
• risclite / ARM9-compatible-soft-CPU-core
  This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone be…
  ☆78Updated 4 years ago
• trivialmips / TrivialMIPS_Software
  Baremetal softwares for TrivialMIPS platform
  ☆11Updated 5 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆57Updated 3 years ago
• ultraembedded / riscv-linux-boot
  Trivial RISC-V Linux binary bootloader
  ☆50Updated 3 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated 10 months ago
• jiegec / jtag-remote-server
  Remote JTAG server for remote debugging
  ☆36Updated 10 months ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated last year
• lingscale / cc01
  ☆31Updated this week
• openrisc / or1ksim
  The OpenRISC 1000 architectural simulator
  ☆74Updated 6 months ago
• litex-hub / pythondata-cpu-rocket
  Python module containing verilog files for rocket cpu (for use with LiteX).
  ☆13Updated 2 months ago
• oscourse-tsinghua / cpu-testcase
  Test cases for MIPS CPU implementation
  ☆12Updated 5 years ago
• CospanDesign / sdio-device
  ☆17Updated 6 years ago
• mmicko / prjtang
  Documenting the Anlogic FPGA bit-stream format.
  ☆86Updated 2 years ago
• b-dmitry1 / V188
  FPGA 80186 IBM PC compatible system for Altera Cyclone IV (EP4CE15F23/EP4CE55F23)
  ☆21Updated 3 years ago
• char-fish-after-lunch / SystemOnCat
  An SoC with multiple RISC-V IMA processors.
  ☆19Updated 6 years ago
• freecores / sparc64soc
  OpenSPARC-based SoC
  ☆63Updated 10 years ago
• SteffenReith / J1Sc
  A reimplementation of a tiny stack CPU
  ☆81Updated last year
• trivialmips / TrivialMIPS
  MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support
  ☆105Updated 5 years ago
• bwitherspoon / rv32cpu
  A RISC-V processor
  ☆13Updated 6 years ago
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆26Updated 5 years ago
• watz0n / learn-rv32i-asap
  A Simple As Possible RISCV-32I core with debug module.
  ☆42Updated 5 years ago
• j-marjanovic / pp-sp-reference-design
  ☆42Updated 3 years ago
• f32c / tools
  ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)
  ☆22Updated 4 months ago
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆68Updated 2 years ago
• shirriff / xc2064
  Reverse engineering the XC2064 FPGA
  ☆74Updated 3 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆37Updated 3 years ago
• Martoni / HdmiCore
  HDMI core in Chisel HDL
  ☆49Updated last year
• CircuitCoder / mill
  RV32I by cats
  ☆17Updated last year
• dramforever / opensbi-h
  WIP: A fork of OpenSBI, with software-emulated hypervisor extension support
  ☆37Updated 3 weeks ago