Alternatives and similar repositories for xlnx-project-template:

Users that are interested in xlnx-project-template are comparing it to the libraries listed below

• necst / iron
  Image Registration on FPGAs
  ☆21Updated 2 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 4 years ago
• CGCL-codes / ScalaBFS
  A Scalable BFS Accelerator on FPGA-HBM Platform
  ☆14Updated last year
• SFU-HiAccel / rodinia-hls
  FPGA version of Rodinia in HLS C/C++
  ☆35Updated 4 years ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆30Updated 3 years ago
• sharc-lab / HLSFactory
  HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
  ☆34Updated this week
• necst / sdaccel_chisel_integration
  Chisel Project for Integrating RTL code into SDAccel
  ☆17Updated 7 years ago
• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆25Updated 4 years ago
• dac-sdc / fpga_starter_2023
  ☆8Updated last year
• template-hls / template-hls-float
  ☆28Updated 5 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• Xilinx / Alveo-PYNQ
  Introductory examples for using PYNQ with Alveo
  ☆51Updated 2 years ago
• tarafdar / galapagos
  ☆25Updated 5 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆49Updated 7 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆41Updated last month
• sfu-arch / SpGEMM
  ☆35Updated 3 years ago
• fpgasystems / GPU-FPGA-Recommendation-System
  FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters
  ☆16Updated 3 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated last year
• UCLA-VAST / splag
  Accelerating SSSP for power-law graphs using an FPGA.
  ☆23Updated 3 years ago
• pc2 / HPCC_FPGA
  A OpenCL-based FPGA benchmark suite for HPC
  ☆32Updated 2 months ago
• OCT-FPGA / OCT-Tutorials
  ☆29Updated 6 months ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆90Updated 6 months ago
• bsc-loca / sauria
  SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…
  ☆36Updated 6 months ago
• pgroupATusc / GraphACT
  Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".
  ☆10Updated 4 years ago
• xupgit / compute_acceleration
  ☆12Updated 5 years ago
• MakarenaLabs / Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow
  Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.
  ☆29Updated 4 years ago
• UIUC-ChenLab / Nimblock
  ☆12Updated last year
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• CMU-SAFARI / Load-Inspector
  A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…
  ☆20Updated 9 months ago
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆27Updated last year