Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. See the video. Pure Verilog. (No soft-core processor.)
☆15Jan 19, 2018Updated 8 years ago
Alternatives and similar repositories for Red_Tracker
Users that are interested in Red_Tracker are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆18Oct 3, 2016Updated 9 years ago
- The official implemention for the paper "Joint Spatial-Temporal and Appearance Modeling with Transformer for Multiple Object Tracking".☆13Oct 20, 2022Updated 3 years ago
- ECE 385 Final Project -- Ethernet on MAX10 DE10-Lite FPGA and Nios II soft processor☆13Dec 13, 2021Updated 4 years ago
- We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.☆31May 18, 2019Updated 6 years ago
- Verilog FPGA code : including experimental DSP audio processor☆13Dec 1, 2020Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Spectrum analyzer system using a 512-point FFT, in a Cyclone IV FPGA. Reads i2s audio from the codec and then does all FFT/VGA functions.…☆31Feb 9, 2018Updated 8 years ago
- ☆40Jan 22, 2026Updated 2 months ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- Verilog Repository for GIT☆35May 4, 2021Updated 4 years ago
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- Verilog Code for a JPEG Decoder☆34Mar 7, 2018Updated 8 years ago
- 基于Surprise实现的具有完整功能的推荐系统服务，并利用flask框架实现了简单的接口调用☆11Jan 20, 2021Updated 5 years ago
- 简易版仿豆瓣影视推荐系统☆10May 1, 2023Updated 2 years ago
- Using Tensorflow to do face_rank☆14Jan 23, 2018Updated 8 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- hdmi-ts Project☆13Jun 11, 2017Updated 8 years ago
- 密码本（微信小程序）☆11Jul 17, 2019Updated 6 years ago
- Free TPU OS running on the FPGA☆10May 6, 2023Updated 2 years ago
- CK workflow, portable packages and other artifacts for the ReQuEST-ASPLOS'18 submission:☆12Jan 16, 2019Updated 7 years ago
- The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))☆11Sep 27, 2019Updated 6 years ago
- ECE563 Final Project - FPGA based camera tracking☆18Dec 17, 2013Updated 12 years ago
- This one is about the paper and the code of "Statistical beamforming for interference mitigation in multi-cell massive MIMO systems".☆11Sep 23, 2021Updated 4 years ago
- ❤️ This is a Xilinx_FPGA _Spartan6 project for modulation 2ASK QPSK ADC DAC ROM SCI☆19Mar 28, 2018Updated 7 years ago
- Zedboard projects☆11May 15, 2016Updated 9 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- FFT algorithm coded in Verilog. Designed to run on a Xillinx Spartan 6 FPGA board.☆15Jul 19, 2012Updated 13 years ago
- ☆13Dec 9, 2024Updated last year
- Identifies ASL Hand Gesture for numbers using image processing in verilog☆14May 3, 2012Updated 13 years ago
- implementation in verilog rtl for an FPGA to detect the presence of a face in an image☆11Mar 12, 2021Updated 5 years ago
- Huffman encoding core (Vivado HLS Project)☆12Oct 15, 2019Updated 6 years ago
- A discouraging story.☆17May 8, 2018Updated 7 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19May 28, 2012Updated 13 years ago
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆14Jul 23, 2020Updated 5 years ago
- Vitis AI Lab: MNIST classifier☆19Aug 11, 2022Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Image Signal Processing Assignments☆16May 1, 2018Updated 7 years ago
- This paper deals with the inter-cell interference (ICI) mitigation in the channel estimation process of millimeter-wave multi-cell beamsp…☆12Sep 23, 2021Updated 4 years ago
- Chips 2.0 Demo for Atlys Spartan 6 development platform. Web app using C to Verilog TCP/IP server.☆16Jan 10, 2018Updated 8 years ago
- Verilog implementation of the SHA-512 hash function.☆44Jan 17, 2026Updated 2 months ago
- Library of generic verilog buildingblocks☆17Dec 25, 2025Updated 3 months ago
- ☆17Jul 21, 2017Updated 8 years ago
- Windfarm Open Data Analysis: “La Haute Borne” (Meuse, France)☆13Nov 12, 2018Updated 7 years ago