Artix7 SOM
☆18Sep 9, 2024Updated last year
Alternatives and similar repositories for cp_som_one
Users that are interested in cp_som_one are comparing it to the libraries listed below
Sorting:
- An embeddable FPGA SoM designed for high-speed audio and USB applications.☆26Mar 15, 2025Updated 11 months ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆22Feb 11, 2026Updated 2 weeks ago
- Experimental Lattice ECP5-driven Data Center Security Communication Module☆20Jul 22, 2024Updated last year
- Board definition files and initial example programs☆20Aug 7, 2021Updated 4 years ago
- CRUVI Standard Specifications☆21May 6, 2024Updated last year
- LiteX development baseboards arround the SQRL Acorn.☆73Mar 17, 2025Updated 11 months ago
- ☆10Oct 23, 2016Updated 9 years ago
- 2-layer and 4-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.☆20Jan 6, 2026Updated last month
- Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language☆17Feb 20, 2019Updated 7 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆28Jan 17, 2026Updated last month
- Hardware Design/Visualization/Simulation/RTLGeneration Framework☆16Feb 12, 2026Updated 2 weeks ago
- "Talking PD" article code repository☆14Jun 23, 2023Updated 2 years ago
- GSI Timing Gateware and Tools☆14Updated this week
- Intel IPU6 Linux sensor enabling guidance☆12Nov 20, 2023Updated 2 years ago
- WCH CH569 SerDes Reverse Engineering☆30Aug 13, 2022Updated 3 years ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆36Feb 23, 2025Updated last year
- Another world port ESP32 TTGO VGA32 v1.4☆13Sep 23, 2024Updated last year
- Tutorial on how to use the AXI ACP on the UltraZed-EG IOCC☆11Jun 13, 2018Updated 7 years ago
- nMigen examples for the ULX3S board☆12May 5, 2022Updated 3 years ago
- Arduino style API for GD32 F1, GD32F3, GD32VF1, CH32F1, CH32V30x and STM32F1, FreeRTOS and Cmake build system included. Some rust was add…☆12Updated this week
- An AMD/Xilinx Artix 50T FPGA on a Pi5 Hat with PCIe and GPIO interconnects as well as SPI programming☆16Sep 25, 2024Updated last year
- LZ4 decoder in assembly for RiscV RV32IC☆12Feb 11, 2022Updated 4 years ago
- Generate animated vector graphics for old-school 90's demos, like ST_NICCC☆18Jan 2, 2024Updated 2 years ago
- ☆30Dec 22, 2020Updated 5 years ago
- ☆19Sep 14, 2025Updated 5 months ago
- VexRiscV system with GDB-Server in Hardware☆21Jul 5, 2023Updated 2 years ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated last year
- FPGA implementation of the AnotherWorld CPU (equivalent to the original VM)☆16Apr 6, 2020Updated 5 years ago
- Full Speed USB DFU interface for FPGA and ASIC designs☆20Mar 10, 2024Updated last year
- Experiments with Yosys cxxrtl backend☆50Jan 16, 2025Updated last year
- Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board☆19Nov 17, 2021Updated 4 years ago
- Current-fed dual inductor converter with wide input and output voltage range☆21Mar 29, 2019Updated 6 years ago
- Bit streams forthe Ulx3s ECP5 device☆18Apr 9, 2023Updated 2 years ago
- KiCAD parser written in python☆17Nov 19, 2024Updated last year
- C++ TCP/IP and SSH stack with bounded run time and no dynamic memory allocations☆41Jul 18, 2025Updated 7 months ago
- An interactive digital logic simulator with verilog support (Yosys)☆27Jan 3, 2026Updated last month
- 4-Layer XC7Z010 DDR3 Layout☆18Nov 25, 2021Updated 4 years ago
- Raspberry Pi hat to test Vaio P displays☆21Dec 28, 2024Updated last year
- Siglent SDS1x0xX-E FPGA bitstreams☆46Dec 24, 2024Updated last year