VANDAL / prismLinks
Modular, flexible, cross-platform workload profiling and characterization
☆13Updated 4 years ago
Alternatives and similar repositories for prism
Users that are interested in prism are comparing it to the libraries listed below
Sorting:
- Heterogeneous simulator for DECADES Project☆32Updated last year
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 3 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 4 years ago
- ☆14Updated 2 years ago
- SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. T…☆143Updated 2 years ago
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆16Updated 4 years ago
- ☆15Updated 4 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆114Updated 2 years ago
- The gem5-X open source framework (based on the gem5 simulator)☆42Updated 2 years ago
- ☆17Updated 3 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆128Updated 3 years ago
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆40Updated 6 years ago
- OPAE porting to Xilinx FPGA devices.☆39Updated 5 years ago
- Fast and accurate DRAM power and energy estimation tool☆189Updated this week
- A parallel and distributed simulator for thousand-core chips☆27Updated 7 years ago
- Papers, Posters, Presentations, Documentation...☆19Updated 2 years ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆70Updated 2 years ago
- DASS HLS Compiler☆29Updated 2 years ago
- Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of th…☆14Updated 5 years ago
- FPGA version of Rodinia in HLS C/C++☆40Updated 5 years ago
- Memory consistency model checking and test generation library.☆16Updated 9 years ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆29Updated 3 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆82Updated 6 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆55Updated 6 years ago
- An open source high level synthesis (HLS) tool built on top of LLVM☆127Updated last year
- Centaur, a framework for hybrid CPU-FPGA databases☆27Updated 8 years ago
- For contributions of Chisel IP to the chisel community.☆70Updated last year
- ☆62Updated this week
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Updated 3 years ago