A C++ to Verilog translation tool with some basic guarantees that your code will work.
☆180Jun 28, 2026Updated 2 months ago
Alternatives and similar repositories for metron
Users that are interested in metron are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Hardware Design/Visualization/Simulation/RTLGeneration Framework☆18Jul 30, 2026Updated last month
- Open source RTL simulation acceleration on commodity hardware☆35Apr 13, 2023Updated 3 years ago
- a small simple slow serial FPGA core☆16Mar 11, 2021Updated 5 years ago
- Learn, share and collaborate on ASIC design using open tools and technologies☆12Dec 27, 2020Updated 5 years ago
- A framework for formally verifying hardware security modules to be free of hardware, software, and timing side-channel vulnerabilities 🔏☆42Nov 29, 2025Updated 9 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Design digital circuits in C. Simulate really fast with a regular compiler.☆183Jan 16, 2026Updated 7 months ago
- Modular, flexible, cross-platform workload profiling and characterization☆13Mar 1, 2021Updated 5 years ago
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 7 years ago
- A hand-written recursive decent Verilog parser.☆10Jun 28, 2026Updated 2 months ago
- ☆52Jan 16, 2025Updated last year
- Reticle evaluation (PLDI 2021)☆12Apr 12, 2021Updated 5 years ago
- 🧮 Polynomial Calculator☆12Jan 3, 2023Updated 3 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆71Jun 28, 2025Updated last year
- C++ logic network library☆304Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Convert C files into Verilog☆22Jan 27, 2019Updated 7 years ago
- A collection of tests and benchmarks for the Arc simulation backend of CIRCT☆39Jan 26, 2026Updated 7 months ago
- A GPU acceleration flow for RTL simulation with batch stimulus☆123Apr 1, 2024Updated 2 years ago
- PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compi…☆745Updated this week
- Exploring gate level simulation☆59Mar 27, 2026Updated 5 months ago
- Proof of Concept to learn Amaranth as an entry effort for Supercon's RTL design competition☆10Nov 11, 2022Updated 3 years ago
- Python bindings for slang, a library for compiling SystemVerilog☆67Jan 18, 2025Updated last year
- Verification Template Engine is a Jinja2-based template engine targeted at verification engineers☆14Jan 4, 2024Updated 2 years ago
- This is the Verilog 2005 parser used by VerilogCreator☆15May 19, 2019Updated 7 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- CPUs☆17Dec 21, 2020Updated 5 years ago
- CV32E40X Design-Verification environment☆19Jun 2, 2026Updated 2 months ago
- An exact real arithmetic (aka constructive reals) for OCaml☆13Jun 14, 2024Updated 2 years ago
- Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pi…☆1,430Aug 23, 2026Updated last week
- ☆15Apr 28, 2026Updated 4 months ago
- The BERI and CHERI processor and hardware platform☆51Mar 27, 2017Updated 9 years ago
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Li…☆27Updated this week
- ☆10Nov 20, 2023Updated 2 years ago
- An open source high level synthesis (HLS) tool built on top of LLVM☆130Jun 11, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Instruction and files for porting Arm DesignStart to CW305.☆17Dec 6, 2023Updated 2 years ago
- An LLVM based mini-C to Verilog High-level Synthesis tool☆42Mar 7, 2025Updated last year
- ☆12Mar 27, 2024Updated 2 years ago
- SystemVerilog package for reading, manipulating, and writing JSON-formatted data☆12Feb 19, 2022Updated 4 years ago
- CoreIR Symbolic Analyzer☆75Oct 27, 2020Updated 5 years ago
- SystemVerilog synthesis tool☆236Mar 10, 2025Updated last year
- Machine-checked Agda formalization for the ILC project☆15Apr 6, 2018Updated 8 years ago