Alternatives and similar repositories for metron

Users that are interested in metron are comparing it to the libraries listed below

• gsmecher / minimax
  Minimax: a Compressed-First, Microcoded RISC-V CPU
  ☆222Updated last year
• nickmqb / wyre
  Hardware definition language that compiles to Verilog
  ☆106Updated 4 years ago
• brouhaha / glacial
  Glacial - microcoded RISC-V core designed for low FPGA resource utilization
  ☆87Updated 6 years ago
• siliconcompiler / logik
  A configurable RTL to bitstream FPGA toolchain
  ☆51Updated 2 weeks ago
• stnolting / captouch
  👇 Add capacitive touch buttons to any FPGA!
  ☆102Updated 3 years ago
• suarezvictor / CflexHDL
  Design digital circuits in C. Simulate really fast with a regular compiler.
  ☆173Updated this week
• MaartenBaert / xormix
  A hardware-optimized high-quality pseudorandom number generator
  ☆37Updated 4 months ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆74Updated this week
• MoonbaseOtago / vroom
  VRoom! RISC-V CPU
  ☆511Updated last year
• chipsalliance / fasm
  FPGA Assembly (FASM) Parser and Generator
  ☆97Updated 3 years ago
• howerj / bit-serial
  A bit-serial CPU written in VHDL, with a simulator written in C.
  ☆132Updated last year
• mattvenn / wokwi-verilog-gds-test
  ☆55Updated 3 years ago
• zeroasiccorp / umi
  Universal Memory Interface (UMI)
  ☆153Updated last week
• JulianKemmerer / PipelineC-Graphics
  Graphics demos
  ☆112Updated last year
• TinyTapeout / vga-playground
  Playground for VGA projects on Tiny Tapeout
  ☆65Updated last month
• sifiveinc / wake
  The SiFive wake build tool
  ☆91Updated 2 weeks ago
• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆191Updated 3 weeks ago
• drom / awesome-riscv
  😎 A curated list of awesome RISC-V implementations
  ☆138Updated 2 years ago
• MPACT-ORG / llvm-project
  The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github…
  ☆31Updated last week
• mnemocron / my-discrete-fpga
  My own FPGA architecture simulated in VHDL, realized with 7400-logic on PCB.
  ☆45Updated last year
• zylin / zpu
  The Zylin ZPU
  ☆244Updated 10 years ago
• Forty-Bot / ethernet
  WIP 100BASE-TX PHY
  ☆76Updated 11 months ago
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 6 months ago
• TinyTapeout / siliwiz
  Silicon Layout Wizard
  ☆186Updated last month
• nickmqb / fpga_craft
  A voxel game/Minecraft clone for the iCE40 UP5K FPGA
  ☆209Updated last week
• adamwalker / fpga-kvs
  A networked FPGA key-value store written in Clash
  ☆29Updated last year
• olofk / corescore
  CoreScore
  ☆166Updated 2 weeks ago
• YosysHQ / abc
  ABC: System for Sequential Logic Synthesis and Formal Verification
  ☆29Updated 3 weeks ago
• PeterAaser / RISCV-FiveStage
  Marginally better than redstone
  ☆100Updated 5 years ago
• cucapra / filament
  Fearless hardware design
  ☆183Updated 2 months ago