Alternatives and similar repositories for metron

Users that are interested in metron are comparing it to the libraries listed below

• gsmecher / minimax
  Minimax: a Compressed-First, Microcoded RISC-V CPU
  ☆221Updated last year
• nickmqb / wyre
  Hardware definition language that compiles to Verilog
  ☆106Updated 3 years ago
• siliconcompiler / logik
  A configurable RTL to bitstream FPGA toolchain
  ☆40Updated last month
• brouhaha / glacial
  Glacial - microcoded RISC-V core designed for low FPGA resource utilization
  ☆86Updated 5 years ago
• sifiveinc / wake
  The SiFive wake build tool
  ☆91Updated this week
• MaartenBaert / xormix
  A hardware-optimized high-quality pseudorandom number generator
  ☆36Updated last month
• howerj / bit-serial
  A bit-serial CPU written in VHDL, with a simulator written in C.
  ☆128Updated 11 months ago
• TinyTapeout / vga-playground
  Playground for VGA projects on Tiny Tapeout
  ☆63Updated 5 months ago
• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆190Updated 3 months ago
• suarezvictor / CflexHDL
  Design digital circuits in C. Simulate really fast with a regular compiler.
  ☆174Updated 2 years ago
• mnemocron / my-discrete-fpga
  My own FPGA architecture simulated in VHDL, realized with 7400-logic on PCB.
  ☆43Updated last year
• MoonbaseOtago / vroom
  VRoom! RISC-V CPU
  ☆508Updated 11 months ago
• adamwalker / fpga-kvs
  A networked FPGA key-value store written in Clash
  ☆28Updated last year
• cucapra / filament
  Fearless hardware design
  ☆178Updated this week
• chipsalliance / fasm
  FPGA Assembly (FASM) Parser and Generator
  ☆95Updated 3 years ago
• zeroasiccorp / umi
  Universal Memory Interface (UMI)
  ☆148Updated this week
• zylin / zpu
  The Zylin ZPU
  ☆245Updated 10 years ago
• mattvenn / wokwi-verilog-gds-test
  ☆55Updated 2 years ago
• MPACT-ORG / llvm-project
  The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github…
  ☆31Updated this week
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆71Updated last week
• stnolting / captouch
  👇 Add capacitive touch buttons to any FPGA!
  ☆102Updated 3 years ago
• trevorpogue / algebraic-nnhw
  Algebraic enhancements for GEMM & AI accelerators
  ☆278Updated 5 months ago
• drom / awesome-riscv
  😎 A curated list of awesome RISC-V implementations
  ☆137Updated 2 years ago
• pc2 / sus-compiler
  A new Hardware Design Language that keeps you in the driver's seat
  ☆114Updated last week
• tomverbeure / mr1
  MR1 formally verified RISC-V CPU
  ☆53Updated 6 years ago
• Forty-Bot / ethernet
  WIP 100BASE-TX PHY
  ☆76Updated 8 months ago
• najaeda / naja-verilog
  A standalone structural (gate-level) verilog parser
  ☆38Updated 3 weeks ago
• DegateCommunity / Degate
  A modern and open-source cross-platform software for chips reverse engineering.
  ☆264Updated 8 months ago
• mosscomp / moss
  A computer for human beings.
  ☆44Updated 9 months ago
• oxidecomputer / cobalt
  A collection of common Bluespec interfaces/modules.
  ☆102Updated last year