Alternatives and similar repositories for 9444:

Users that are interested in 9444 are comparing it to the libraries listed below

• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 2 weeks ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆40Updated last month
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆39Updated last month
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆68Updated 2 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆79Updated 4 years ago
• ultraembedded / core_uriscv
  Another tiny RISC-V implementation
  ☆54Updated 3 years ago
• pbing / USB
  FPGA USB 1.1 Low-Speed Implementation
  ☆34Updated 6 years ago
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆53Updated last year
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆79Updated 2 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 2 years ago
• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆129Updated last year
• ultraembedded / core_dvi_framebuffer
  Minimal DVI / HDMI Framebuffer
  ☆79Updated 4 years ago
• hamsternz / Rudi-RV32I
  A rudimental RISCV CPU supporting RV32I instructions, in VHDL
  ☆117Updated 4 years ago
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆79Updated 5 months ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆89Updated 4 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆61Updated 6 years ago
• zxmarcos / huedeon-gpu
  FPGA GPU design for DE1-SoC
  ☆73Updated 3 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• tomverbeure / mr1
  MR1 formally verified RISC-V CPU
  ☆54Updated 6 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆105Updated 10 years ago
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆176Updated 3 months ago
• BrianHGinc / BrianHG-DDR3-Controller
  DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…
  ☆76Updated 11 months ago
• tommythorn / yarvi
  Yet Another RISC-V Implementation
  ☆91Updated 6 months ago
• aignacio / nox
  RISC-V Nox core
  ☆62Updated last week
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆86Updated 6 years ago
• bonfireprocessor / bonfire-cpu
  FPGA optimized RISC-V (RV32IM) implemenation
  ☆34Updated 4 years ago
• waviousllc / wav-lpddr-hw
  Wavious DDR (WDDR) Physical interface (PHY) Hardware
  ☆102Updated 3 years ago
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆63Updated 6 years ago
• Dmitriy0111 / nanoFOX
  A small RISC-V core (SystemVerilog)
  ☆31Updated 5 years ago