Alternatives and similar repositories for CFU-Playground:

Users that are interested in CFU-Playground are comparing it to the libraries listed below

• sld-columbia / esp
  Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
  ☆356Updated this week
• ucb-bar / gemmini
  Berkeley's Spatial Array Generator
  ☆872Updated this week
• pymtl / pymtl3
  Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
  ☆398Updated this week
• PrincetonUniversity / openpiton
  The OpenPiton Platform
  ☆667Updated 4 months ago
• siliconcompiler / siliconcompiler
  Modular hardware build system
  ☆924Updated this week
• openhwgroup / cvfpu
  Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
  ☆455Updated last week
• openhwgroup / core-v-cores
  CORE-V Family of RISC-V Cores
  ☆229Updated last week
• black-parrot / black-parrot
  A Linux-capable RISC-V multicore for and by the world
  ☆658Updated last week
• UCSBarchlab / OpenTPU
  A open source reimplementation of Google's Tensor Processing Unit (TPU).
  ☆402Updated 7 years ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,038Updated this week
• NNgen / nngen
  NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
  ☆346Updated last year
• chipsalliance / VeeRwolf
  FuseSoC-based SoC for VeeR EH1 and EL2
  ☆306Updated 2 months ago
• pulp-platform / ara
  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …
  ☆398Updated this week
• openhwgroup / core-v-mcu
  This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
  ☆172Updated last year
• openhwgroup / cvw
  CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…
  ☆310Updated this week
• firesim / firesim
  FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
  ☆907Updated 2 weeks ago
• KastnerRG / pp4fpgas
  Parallel Programming for FPGAs -- An open-source high-level synthesis book
  ☆812Updated last month
• os-fpga / open-source-fpga-resource
  A list of resources related to the open-source FPGA projects
  ☆397Updated 2 years ago
• pulp-platform / riscv-dbg
  RISC-V Debug Support for our PULP RISC-V Cores
  ☆243Updated 3 months ago
• VLSIDA / OpenRAM
  An open-source static random access memory (SRAM) compiler.
  ☆873Updated 3 months ago
• tenstorrent / riscv-ocelot
  Ocelot: The Berkeley Out-of-Order Machine With V-EXT support
  ☆157Updated last month
• tensil-ai / tensil
  Open source machine learning accelerators
  ☆371Updated 10 months ago
• pulp-platform / pulpissimo
  This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…
  ☆399Updated 2 weeks ago
• chipsalliance / f4pga
  FOSS Flow For FPGA
  ☆369Updated last month
• olofk / edalize
  An abstraction library for interfacing EDA tools
  ☆663Updated last week
• pulp-platform / snitch
  ⛔ DEPRECATED ⛔ Lean but mean RISC-V system!
  ☆219Updated last year
• chipsalliance / Cores-VeeR-EL2
  VeeR EL2 Core
  ☆263Updated this week
• intel / systemc-compiler
  This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
  ☆264Updated last week
• pulp-platform / common_cells
  Common SystemVerilog components
  ☆572Updated 2 weeks ago
• pulp-platform / pulp
  This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain a…
  ☆473Updated 2 months ago