thu-cs-lab / Digital-Design-Docs

Related projects: ⓘ

• huang-jl / LLCL-MIPS
  LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…
  ☆33Updated 2 years ago
• cnyangkun / nscscc2018
  nscscc2018
  ☆26Updated 5 years ago
• zencove-thu / zencove-zoom
  Highly configurable out-of-order MIPS32 processor, capable of booting Linux.
  ☆34Updated last year
• YAVGroup / Verilog-OJ
  Online judge server for Verilog | verilogoj.ustc.edu.cn
  ☆75Updated 2 months ago
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated last year
• ustb-owl / Uranus
  Uranus MIPS processor by MaxXing & USTB NSCSCC team
  ☆35Updated 4 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆54Updated 2 years ago
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆65Updated last year
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆18Updated 6 months ago
• OSCPU / oscpu-framework
  ☆43Updated this week
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆43Updated 2 months ago
• Maxpicca-Li / CDIM
  CQU Dual Issue Machine
  ☆31Updated 2 months ago
• nscscc2019ucas / nscscc2019ucas
  ☆32Updated 5 years ago
• cyyself / cyyrv64
  My RV64 CPU (Work in progress)
  ☆18Updated last year
• Superscalar-HIT-Core / Superscalar-HIT-Core-NSCSCC2020
  a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog
  ☆44Updated 9 months ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆21Updated last year
• cyyself / CDIM-SoC
  SoC for CQU Dual Issue Machine
  ☆11Updated 2 years ago
• RickyTino / MangoMIPS32
  A softcore microprocessor of MIPS32 architecture.
  ☆39Updated 2 months ago
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆97Updated 2 months ago
• OSCPU / chisel-playground
  ☆54Updated 2 months ago
• trivialmips / TrivialMIPS_Software
  Baremetal softwares for TrivialMIPS platform
  ☆10Updated 5 years ago
• MaxXSoft / Bossa
  BOOM's Simulation Accelerator.
  ☆11Updated 2 years ago
• cnyangkun / nscscc2017
  National Student Computer System Capability Challenge
  ☆9Updated 5 years ago
• HIT-MaRiver-mips / cpucore-mariver
  ☆32Updated last year
• cassuto / yamp-32
  NSCSCC 2020 - Yet Another MIPS Processor
  ☆14Updated 3 years ago
• ljwljwljwljw / DiplomaticBackend
  ☆17Updated 2 years ago
• CherrySprings / CherrySprings
  ☆17Updated last year
• NSCSCC-2022-TJU / ChiselMIPS
  第六届龙芯杯混元形意太极门战队作品
  ☆16Updated 2 years ago
• nju-mips / noop-lo
  A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.
  ☆25Updated 4 years ago
• thu-cs-lab / verilog-coding-standard
  Recommended coding standard of Verilog and SystemVerilog.
  ☆32Updated 2 years ago