awai54st / Enabling-Binary-Neural-Network-Training-on-the-Edge
☆18Updated 3 years ago
Alternatives and similar repositories for Enabling-Binary-Neural-Network-Training-on-the-Edge:
Users that are interested in Enabling-Binary-Neural-Network-Training-on-the-Edge are comparing it to the libraries listed below
- Approximate layers - TensorFlow extension☆27Updated last week
- Open-source artifacts and codes of our MICRO'23 paper titled “Sparse-DySta: Sparsity-Aware Dynamic and Static Scheduling for Sparse Multi…☆37Updated last year
- FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.☆23Updated last year
- ☆26Updated 3 weeks ago
- ☆23Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- ☆34Updated 4 years ago
- ☆33Updated 6 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆32Updated last year
- An HLS based winograd systolic CNN accelerator☆50Updated 3 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆52Updated last week
- ☆70Updated 5 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆91Updated 3 years ago
- ☆39Updated 9 months ago
- ☆71Updated 2 years ago
- Fast Emulation of Approximate DNN Accelerators in PyTorch☆22Updated last year
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆74Updated 3 years ago
- Neural Network Evaluation Tool on Crossbar-based Accelerator with Resistive Memory☆40Updated 5 years ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆34Updated last week
- ☆29Updated 5 months ago
- ☆11Updated 2 years ago
- HLS implemented systolic array structure☆41Updated 7 years ago
- ☆18Updated 2 years ago
- This project implements a convolution kernel based on vivado HLS on zcu104☆37Updated 5 years ago
- A collection of tutorials for the fpgaConvNet framework.☆39Updated 7 months ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆136Updated 2 months ago
- ☆57Updated 4 years ago
- [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores☆12Updated 3 years ago
- Open-source of MSD framework☆16Updated last year
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆58Updated 3 years ago