☆25Feb 11, 2025Updated last year
Alternatives and similar repositories for DAM-RS
Users that are interested in DAM-RS are comparing it to the libraries listed below
Sorting:
- ☆26Oct 6, 2023Updated 2 years ago
- The source code of "Agents of Autonomy: A Systematic Study of Robotics on Modern Hardware" paper☆29Dec 18, 2023Updated 2 years ago
- Unlimited Vector Extension with Data Streaming Support☆12Nov 25, 2024Updated last year
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆59Jul 22, 2025Updated 7 months ago
- An alternative Vivado custom design example (to fully Vitis) for the User Logic Partition targeting VCK5000☆13Jul 16, 2024Updated last year
- A system-level domain-specific systems-on-chip simulation framework☆21Nov 21, 2022Updated 3 years ago
- ☆14Feb 28, 2023Updated 3 years ago
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆22Oct 31, 2024Updated last year
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆169Mar 2, 2023Updated 3 years ago
- Papers, Posters, Presentations, Documentation...☆19Jan 9, 2024Updated 2 years ago
- ☆24Nov 27, 2025Updated 3 months ago
- ordspecsim: The Swarm architecture simulator☆24Feb 15, 2023Updated 3 years ago
- UniSparse: An Intermediate Language for General Sparse Format Customization (OOPSLA'24)☆33Nov 12, 2024Updated last year
- A polyhedral compiler for hardware accelerators☆59Jul 24, 2024Updated last year
- The Chronos FPGA Framework to accelerate ordered applications☆22May 20, 2020Updated 5 years ago
- ☆24Nov 10, 2020Updated 5 years ago
- ☆28Feb 26, 2023Updated 3 years ago
- CVA6 softcore contest☆22Updated this week
- A Speculation-Aware Collaborative Dependence Analysis Framework☆28Jun 29, 2024Updated last year
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆36Jan 16, 2025Updated last year
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Jul 17, 2023Updated 2 years ago
- ☆62Updated this week
- Buda Compiler Backend for Tenstorrent devices☆30Apr 2, 2025Updated 11 months ago
- Collaborative Parallelization Framework (CPF)☆33Aug 8, 2023Updated 2 years ago
- A reference implementation of the Mind Mappings Framework.☆30Dec 2, 2021Updated 4 years ago
- Code released to accompany the ISCA paper: "T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware"☆28Feb 18, 2022Updated 4 years ago
- ☆32Dec 1, 2022Updated 3 years ago
- An Open-Source Tool for CGRA Accelerators☆82Sep 11, 2025Updated 5 months ago
- ☆40Mar 2, 2023Updated 3 years ago
- Heterogeneous simulator for DECADES Project☆32May 23, 2024Updated last year
- A Shared Memory Multithreaded Graph Benchmark Suite for Multicores☆36May 30, 2025Updated 9 months ago
- Automated Repair of Verilog Hardware Descriptions☆36Jan 16, 2025Updated last year
- A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robot…☆46Apr 9, 2025Updated 10 months ago
- Materials, slides, and workspace for the gem5 bootcamp 2024☆52Jan 23, 2026Updated last month
- Network on chip based neural network accelerator☆10Mar 25, 2021Updated 4 years ago
- LLM-DSE: Searching Accelerator Parameters with LLM Agents☆13May 22, 2025Updated 9 months ago
- This github repository hosts the code used within my thesis work and my last publication.☆12Jul 20, 2017Updated 8 years ago
- FlappyBird愤怒的小鸟 c++游戏实现 学习代码☆10Nov 16, 2018Updated 7 years ago
- Extending BookSim2.0 and HotSpot6.0 for Power, Performance and Thermal evaluation of 3D NoC Architectures☆12Aug 9, 2019Updated 6 years ago