aniket0511 / Sigmoid-FunctionLinks
Hardware Implementation of Sigmoid Function using verilog HDL
☆15Updated 5 years ago
Alternatives and similar repositories for Sigmoid-Function
Users that are interested in Sigmoid-Function are comparing it to the libraries listed below
Sorting:
- Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project☆16Updated 5 years ago
- ☆34Updated 6 years ago
- A verilog implementation for Network-on-Chip☆73Updated 7 years ago
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆76Updated last year
- tpu-systolic-array-weight-stationary☆24Updated 4 years ago
- Systolic matrix multiplication kernel implemented on Xilinx PYNQ FPGA board☆14Updated 5 years ago
- This is a verilog implementation of 4x4 systolic array multiplier☆55Updated 4 years ago
- 32-bit 5-Stage Pipelined RISC V RV32I Core☆49Updated 11 months ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆65Updated 10 months ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆44Updated last year
- L1 Data, L1 Instruction and L2 Unified Cache Design FOR RV64IMC☆12Updated 2 years ago
- A collection of commonly asked RTL design interview questions☆31Updated 8 years ago
- INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.☆103Updated 4 years ago
- Systolic array based simple TPU for CNN on PYNQ-Z2☆33Updated 3 years ago
- ☆18Updated 2 months ago
- ☆22Updated last year
- 32 - bit floating point Multiplier Accumulator Unit (MAC)☆30Updated 4 years ago
- A generic implementation of AMBA AXI4 communication protocol. The design provides a master, a slave and an interconnect with multiple mas…☆38Updated 2 years ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆16Updated 4 years ago
- General Purpose AXI Direct Memory Access☆51Updated last year
- Template for project1 TPU☆19Updated 4 years ago
- UVM and System Verilog Manuals☆43Updated 6 years ago
- ☆19Updated last year
- 32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.☆86Updated 6 years ago
- Using verilog to implement MAC (Multiply Accumulate) . Verifying it by testbench .☆12Updated 6 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆27Updated 6 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆162Updated 5 years ago
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆21Updated 4 years ago
- AIChip 2021 project, NCKU☆18Updated 4 years ago
- Simple cache design implementation in verilog☆49Updated last year