Alternatives and similar repositories for magic_vlsi_examples:

Users that are interested in magic_vlsi_examples are comparing it to the libraries listed below

• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 3 years ago
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 3 years ago
• FPGA-Research / eFPGA---RTL-to-GDS-with-SKY130
  This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk
  ☆27Updated 3 years ago
• sgherbst / msdsl
  Automatic generation of real number models from analog circuits
  ☆37Updated 9 months ago
• shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
  This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…
  ☆40Updated 3 years ago
• vsdip / vsdsram_sky130
  ☆40Updated 2 years ago
• manili / VSDBabySoC
  VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
  ☆35Updated 3 years ago
• praharshapm / vsdmixedsignalflow
  This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…
  ☆42Updated 4 years ago
• akilm / Physical-Design
  Physical Design Flow from RTL to GDS using Opensource tools.
  ☆86Updated 4 years ago
• ucdrstdenis / cdsAsync
  cdsAsync: An Asynchronous QDI VLSI Toolset & Schematic Library
  ☆25Updated 5 years ago
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆64Updated 4 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆63Updated 3 years ago
• UNSAMDCI / PDK_ONC5
  Educational Design Kit for Synopsys Tools with a set of Characterized Standard Cell Library
  ☆30Updated 3 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆35Updated 2 years ago
• yathAg / openroad_vsd_7nmContest
  ☆12Updated last year
• idea-fasoc / fasoc
  ☆53Updated last year
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆47Updated 2 years ago
• asyncvlsi / AMC
  AMC: Asynchronous Memory Compiler
  ☆47Updated 4 years ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆46Updated 8 months ago
• mabrains / OpenAnalogDesign
  Open Analog Design Environment
  ☆22Updated last year
• The-OpenROAD-Project / TritonCTS
  Source codes and calibration scripts for clock tree synthesis
  ☆40Updated 4 years ago
• Geetima2021 / PLL-IC-design-using-Open-Source-PDK-Google-Skywater-130nm
  This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.
  ☆19Updated 2 years ago
• yash-k99 / vsdsram
  Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM
  ☆19Updated 4 years ago
• sgherbst / anasymod
  A framework for FPGA emulation of mixed-signal systems
  ☆34Updated 3 years ago
• varunnagpaal / Digital-Hardware-Modelling
  Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
  ☆62Updated 4 years ago
• The-OpenROAD-Project / megaboom
  ☆24Updated this week
• nickson-jose / openlane_build_script
  This script builds openlane and all its dependencies on an Ubuntu (only) System.
  ☆21Updated 2 years ago
• efabless / mpw_precheck
  ☆36Updated 3 months ago
• efabless / sky130_sram_macros_old
  ☆36Updated 2 years ago
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆38Updated 5 years ago