Some simple examples for the Magic VLSI physical chip layout tool.
☆31Mar 9, 2021Updated 5 years ago
Alternatives and similar repositories for magic_vlsi_examples
Users that are interested in magic_vlsi_examples are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- All the projects and assignments done as part of VLSI course.☆21Sep 23, 2020Updated 5 years ago
- 32-bit RISC-V microcontroller☆12Sep 11, 2021Updated 4 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆62Aug 7, 2022Updated 4 years ago
- VLSI EDA Global Router☆85Feb 15, 2026Updated 6 months ago
- Examples from the Openlane repository, adapted as Fusesoc cores☆12May 18, 2021Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Graph your gate-level verilog code as a directed graph!☆17Nov 3, 2020Updated 5 years ago
- ☆12May 31, 2016Updated 10 years ago
- Our project involves the design of an 8-bit microprocessor data-path including 8-byte dual port memory, ALU and barrel shifter using CMOS…☆15Jan 2, 2021Updated 5 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆25Jan 20, 2021Updated 5 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆174Nov 10, 2025Updated 9 months ago
- Tcl kernel for Jupyter☆15Jul 11, 2026Updated last month
- AMC: Asynchronous Memory Compiler☆56Jun 29, 2020Updated 6 years ago
- Magic VLSI Layout Tool☆699Updated this week
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆136Apr 23, 2023Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Converting Boolean expressions to CMOS Circuits☆11Oct 6, 2020Updated 5 years ago
- Cryptography accelerator core (for AES128/AES256 and SHA256) designed in Chisel3, primarily targeting ASIC platforms.☆11Jan 11, 2021Updated 5 years ago
- Magic VLSI Layout Tool☆21Oct 10, 2019Updated 6 years ago
- This package provides a gnucap based qucsator implementation.☆16May 13, 2026Updated 3 months ago
- Steiner Shallow-Light Tree for VLSI Routing☆63Jul 11, 2024Updated 2 years ago
- A python sccript to spam a chat on whatsapp!☆23Oct 28, 2020Updated 5 years ago
- A collection of course repositories of IIITDM Kancheepuram students☆27Jan 18, 2021Updated 5 years ago
- Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of th…☆16Sep 24, 2020Updated 5 years ago
- ☆32Sep 3, 2025Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node☆17Mar 31, 2021Updated 5 years ago
- ☆14Apr 13, 2025Updated last year
- A High-performance Timing Analysis Tool for VLSI Systems☆716Dec 26, 2025Updated 8 months ago
- Mastering FPGASIC Book☆19Oct 26, 2025Updated 10 months ago
- ☆59Sep 30, 2023Updated 2 years ago
- Hardware Formal Verification☆17Aug 10, 2020Updated 6 years ago
- ☆39Jul 11, 2022Updated 4 years ago
- ☆21Mar 5, 2023Updated 3 years ago
- A simple function to add wavedrom diagrams into an ipython notebook.☆24Jan 14, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 5 years ago
- Mirror of the now discontinued ORCA RISC-V processor from VectorBlox.☆11Feb 11, 2020Updated 6 years ago
- Webhook puppet module for executing r10k when git repository is pushed.☆12Apr 13, 2015Updated 11 years ago
- FPGA core for SHA256d mining targeting Lattice iCE40 devices.☆21Jun 13, 2021Updated 5 years ago
- An FPGA NES emulator designed by a high level synthesis (HLS)☆16Jun 11, 2017Updated 9 years ago
- Learning git just became more easy☆14Oct 21, 2020Updated 5 years ago
- A prototype of Concolic Testing engine for SystemVerilog, developed as part of PFN summer internship 2018.☆21Dec 21, 2018Updated 7 years ago