adamwalker / fpga-kvs
A networked FPGA key-value store written in Clash
☆28Updated last year
Alternatives and similar repositories for fpga-kvs
Users that are interested in fpga-kvs are comparing it to the libraries listed below
Sorting:
- A place to share libraries and utilities that don't belong in the core bsc repo☆35Updated 2 months ago
- FPGA-based HyperLogLog Accelerator☆12Updated 4 years ago
- Caribou: Distributed Smart Storage built with FPGAs☆65Updated 6 years ago
- A Verilog Synthesis Regression Test☆37Updated last year
- Iodine: Verifying Constant-Time Execution of Hardware☆12Updated 4 years ago
- A home for Genesis2 sources.☆41Updated this week
- Manythread RISC-V overlay for FPGA clusters☆38Updated 2 years ago
- A fault-injection framework using Chisel and FIRRTL☆36Updated last week
- Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …☆56Updated 5 years ago
- 🔁 elastic circuit toolchain☆30Updated 5 months ago
- REAPR (Reconfigurable Engine for Automata Processing) is a general-purpose framework for accelerating automata processing applications su…☆16Updated 5 years ago
- HLS implementation of cuckoo hashing. Refer to paper : https://ieeexplore.ieee.org/document/7577355/☆14Updated 6 years ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆27Updated last week
- Network components (NIC, Switch) for FireBox☆18Updated 6 months ago
- Formal semantics of BSV (Bluespec SystemVerilog), given as a Haskell Program and accompanying document☆18Updated 8 years ago
- doppioDB - A hardware accelerated database☆49Updated 8 years ago
- SCARV: a side-channel hardened RISC-V platform☆26Updated 2 years ago
- DyRACT Open Source Repository☆16Updated 9 years ago
- CMod-S6 SoC☆41Updated 7 years ago
- The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github…☆31Updated last month
- Network packet parser generator☆51Updated 4 years ago
- A versatile Wireshark-compatible packet filter, capable of 100G speeds and higher. Also known as FFShark☆48Updated 3 years ago
- Network Development Kit (NDK) for FPGA cards with example application☆51Updated this week
- A Verilog parser for Haskell.☆34Updated 3 years ago
- Verification environment for the OpenHW Group's CORE-V High Performance Data Cache controller.☆11Updated 3 months ago
- A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure☆14Updated 5 years ago
- OmniXtend cache coherence protocol☆82Updated 4 years ago
- Networking Template Library for Vivado HLS☆28Updated 4 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆69Updated last year
- Hardware implementation of the SipHash short-inout PRF☆17Updated last month