JohnDRO / Golirev-IDELinks
An online Verilog IDE based on YosysJS.
☆24Updated 9 years ago
Alternatives and similar repositories for Golirev-IDE
Users that are interested in Golirev-IDE are comparing it to the libraries listed below
Sorting:
- a simple C-to-Verilog compiler☆51Updated 8 years ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆53Updated 4 years ago
- A Verilog Synthesis Regression Test☆37Updated last year
- A Verilog parser for Haskell.☆35Updated 4 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- A bit-serial CPU☆19Updated 5 years ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆29Updated last week
- A reimplementation of a tiny stack CPU☆85Updated last year
- ☆61Updated last year
- Open Processor Architecture☆26Updated 9 years ago
- chipy hdl☆17Updated 7 years ago
- OpenFPGA☆34Updated 7 years ago
- Experiments with Yosys cxxrtl backend☆49Updated 6 months ago
- The BERI and CHERI processor and hardware platform☆49Updated 8 years ago
- Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)☆36Updated 4 years ago
- PicoRV☆44Updated 5 years ago
- SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research☆38Updated 11 months ago
- FPGA Assembly (FASM) Parser and Generator☆94Updated 3 years ago
- Yosys Plugins☆21Updated 6 years ago
- A collection of big designs to run post-synthesis simulations with yosys☆49Updated 9 years ago
- Repository and Wiki for Chip Hack events.☆51Updated 4 years ago
- Exploration of alternative hardware description languages☆28Updated 7 years ago
- A 32-bit RISC-V processor for mriscv project☆58Updated 8 years ago
- Torc: Tools for Open Reconfigurable Computing☆39Updated 8 years ago
- Project X-Ray Database: XC7 Series☆70Updated 3 years ago
- Untethered (stand-alone) FPGA implementation of the lowRISC SoC☆56Updated 5 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated 2 years ago
- This is a simple UART echo test for the iCEstick Evaluation Kit☆38Updated 6 years ago
- ☆23Updated 2 months ago
- IRSIM switch-level simulator for digital circuits☆34Updated 3 months ago