Memory consistency modelling using Alloy
☆31Dec 16, 2020Updated 5 years ago
Alternatives and similar repositories for memalloy
Users that are interested in memalloy are comparing it to the libraries listed below
Sorting:
- Alloy models for automatic synthesis of memory model litmus test suites (from ASPLOS 2017)☆16Jan 26, 2024Updated 2 years ago
- ☆71May 29, 2019Updated 6 years ago
- A verification tool for many memory models☆114Updated this week
- A Symbolic Emulator for Shuffle Synthesis on the NVIDIA PTX Code☆15Mar 19, 2023Updated 2 years ago
- HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs☆31Sep 19, 2024Updated last year
- ☆13Jun 22, 2017Updated 8 years ago
- ☆14Feb 20, 2026Updated 2 weeks ago
- A formalization of the RVWMO (RISC-V) memory model☆36Jun 23, 2022Updated 3 years ago
- An Architecture-level Fault Injection Tool for GPU Application Resilience Evaluations☆19Apr 14, 2020Updated 5 years ago
- Memory consistency model checking and test generation library.☆16Oct 14, 2016Updated 9 years ago
- Process Orchestration Framework: A camunda 7 fork☆21Updated this week
- ☆27Nov 30, 2018Updated 7 years ago
- IC3PO: IC3 for Proving Protocol Properties☆28Sep 10, 2024Updated last year
- Open source release from our ICLR 2020 paper, CLN2INV: Learning Loop Invariants with Continuous Logic Networks.☆21Jun 8, 2020Updated 5 years ago
- ☆24Jun 24, 2022Updated 3 years ago
- SDLC Copilot is an Agentic AI system designed to streamline and automate the Software Development Lifecycle (SDLC). From requirement gath…☆23Jun 14, 2025Updated 8 months ago
- ☆23Dec 30, 2025Updated 2 months ago
- Vulkan-Sim is a GPU architecture simulator for Vulkan ray tracing based on GPGPU-Sim and Mesa.☆77Jan 31, 2025Updated last year
- ☆10Oct 11, 2022Updated 3 years ago
- A repository where GPU applications are aggregated using a common build flow that supports multiple CUDA versions.☆93Updated this week
- A tool for checking the contract satisfaction for hardware designs☆12Nov 4, 2025Updated 4 months ago
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆50Oct 28, 2024Updated last year
- General purpose RF IQ modulator using VGA graphics DAC☆11May 16, 2016Updated 9 years ago
- A Grand Sumo prediction game☆10Updated this week
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- Atom linter for Verilog/SystemVerilog, using Icarus Verilog, Slang, Verible or Verilator.☆10Jul 12, 2023Updated 2 years ago
- https://icml.cc/virtual/2023/poster/24354☆10Aug 15, 2023Updated 2 years ago
- The Herd toolsuite to deal with .cat memory models (version 7.xx)☆293Updated this week
- Repository for the paper "T5APR: Empowering Automated Program Repair across Languages through Checkpoint Ensemble."☆11Oct 23, 2025Updated 4 months ago
- Automatic Parallelism Using LLVM☆10Aug 2, 2014Updated 11 years ago
- A risc v based architecture to develop a core/ processor which is capable of Matrix MAC Operations☆11Apr 21, 2024Updated last year
- Data Flow Matrix Machines. Generalization of recurrent neural networks.☆15Dec 24, 2024Updated last year
- A minimalist deep research framework for any OpenAI API compatible LLMs.☆14Nov 3, 2025Updated 4 months ago
- An implementation of the Pregel graph processing system on the Spark cluster computing framework. Merged into Spark; please see:☆11Apr 9, 2011Updated 14 years ago
- A tool for cross-checking Verilog compilers☆14Apr 16, 2025Updated 10 months ago
- A RISC-V RV32 model ready for SMT program synthesis.☆12Jun 23, 2021Updated 4 years ago
- Composable Data and Type Generators for C++☆10Mar 25, 2019Updated 6 years ago
- Manycore platform Simulation tool for NoC-based platform at a Cycle-accurate level☆11Feb 22, 2018Updated 8 years ago
- Hardware Division Units☆10Jul 17, 2014Updated 11 years ago