Alternatives and similar repositories for memalloy

Users that are interested in memalloy are comparing it to the libraries listed below

• NVlabs / litmustestgen
  Alloy models for automatic synthesis of memory model litmus test suites (from ASPLOS 2017)
  ☆16Updated last year
• daniellustig / riscv-memory-model
  A formalization of the RVWMO (RISC-V) memory model
  ☆34Updated 3 years ago
• PrincetonUniversity / SCAF
  A Speculation-Aware Collaborative Dependence Analysis Framework
  ☆28Updated last year
• vegaluisjose / reticle
  ☆40Updated 3 years ago
• PrincetonUniversity / ILAng
  A Modeling and Verification Platform for SoCs using ILAs
  ☆77Updated last year
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆26Updated last year
• gussmith23 / lakeroad
  FPGA synthesis tool powered by program synthesis
  ☆51Updated last month
• diffblue / hw-cbmc
  The HW-CBMC and EBMC Model Checkers for Verilog
  ☆81Updated this week
• TeamVoss / VossII
  The source code to the Voss II Hardware Verification Suite
  ☆55Updated 3 weeks ago
• aqjune / mlir-tv
  A translation validation framework for MLIR
  ☆88Updated 4 months ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆73Updated 4 years ago
• cucapra / dahlia
  Time-sensitive affine types for predictable hardware generation
  ☆145Updated last month
• David-Durst / embeddedHaskellAetherling
  ☆26Updated 2 years ago
• kumasento / polymer
  Bridging polyhedral analysis tools to the MLIR framework
  ☆116Updated last year
• stanford-centaur / pono
  Pono: A flexible and extensible SMT-based model checker
  ☆106Updated last week
• PrincetonUniversity / IMDb-Archive
  ILA Model Database
  ☆23Updated 4 years ago
• cucapra / latte21
  Languages, Tools, and Techniques for Accelerator Design
  ☆33Updated 3 years ago
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆33Updated 2 years ago
• ymherklotz / vericert
  A formally verified high-level synthesis tool based on CompCert and written in Coq.
  ☆93Updated last year
• apl-cornell / PDL
  A Hardware Pipeline Description Language
  ☆45Updated 3 weeks ago
• David-Durst / aetherling
  Create auto-scheduled data-parallel pipelines in hardware with user-friendly Python
  ☆13Updated 4 years ago
• jetafese / btor2mlir
  Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification
  ☆15Updated 8 months ago
• RafaelTupynamba / SMTSampler
  SMTSampler: Efficient Stimulus Generation from Complex SMT Constraints
  ☆29Updated 5 years ago
• ymanerka / rtlcheck
  RTLCheck
  ☆22Updated 6 years ago
• ychen306 / vegen
  ☆30Updated 2 years ago
• project-oak / silveroak
  Formal specification and verification of hardware, especially for security and privacy.
  ☆126Updated 3 years ago
• gokhankici / iodine
  Iodine: Verifying Constant-Time Execution of Hardware
  ☆13Updated 4 years ago
• uwplse / rake
  compiling DSLs to high-level hardware instructions
  ☆23Updated 2 years ago
• mit-plv / kami
  A Platform for High-Level Parametric Hardware Specification and its Modular Verification
  ☆157Updated 3 weeks ago
• cucapra / diospyros
  Search-based compiler for high-performance DSP programming
  ☆67Updated 9 months ago