QianpengLi577 / Neuromorphic-Processor-paper-listLinks
I will share some useful or interesting papers about neuromorphic processor
☆25Updated 5 months ago
Alternatives and similar repositories for Neuromorphic-Processor-paper-list
Users that are interested in Neuromorphic-Processor-paper-list are comparing it to the libraries listed below
Sorting:
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆28Updated 9 months ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆85Updated 3 years ago
- Framework for radix encoded SNN on FPGA☆14Updated 3 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆23Updated 5 years ago
- An energy simulation framework for BPTT-based SNN inference and training.☆16Updated last year
- ☆19Updated 4 years ago
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆33Updated 5 months ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆38Updated 5 years ago
- SNN on FPGA☆10Updated 3 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆57Updated 3 years ago
- ☆17Updated 4 years ago
- A repository FPGA-friendly SNN models☆34Updated 4 years ago
- MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award☆14Updated last year
- Spiking Neural Network RTL Implementation☆58Updated 4 years ago
- A nest brain simulator based on FPGA(LIF NEURON)☆14Updated 3 years ago
- NeuroSync: A Scalable and Accurate Brain Simulation System using Safe and Efficient Speculation (HPCA 2022)☆12Updated 2 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆13Updated last year
- FPGA based Leaky Integrate and Fire (LIF) neuron model accelerator for PyTorch☆74Updated 2 weeks ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆174Updated last year
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 6 years ago
- Benchmark framework of synaptic device technologies for a simple neural network☆207Updated 3 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆186Updated 6 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆34Updated 5 years ago
- A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems☆170Updated 7 months ago
- ☆18Updated last year
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Updated 2 years ago
- ☆47Updated last year
- FPGA Design of a Spiking Neural Network.☆41Updated last year
- LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.☆11Updated 3 months ago
- [TVLSI'23] This repository contains the source code for the paper "FireFly: A High-Throughput Hardware Accelerator for Spiking Neural Net…☆20Updated last year