ChFrenkel / ReckOnLinks
ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.
☆84Updated 3 years ago
Alternatives and similar repositories for ReckOn
Users that are interested in ReckOn are comparing it to the libraries listed below
Sorting:
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆59Updated 2 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆185Updated 6 years ago
- I will share some useful or interesting papers about neuromorphic processor☆25Updated 4 months ago
- Spiking Neural Network RTL Implementation☆57Updated 4 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆36Updated 4 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆57Updated 3 years ago
- Fully opensource spiking neural network accelerator☆152Updated 2 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆34Updated 5 years ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆170Updated last year
- A repository FPGA-friendly SNN models☆34Updated 4 years ago
- Leaky Integrate and Fire (LIF) model implementation for FPGA☆69Updated 2 weeks ago
- ☆47Updated last year
- Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.☆50Updated last year
- FPGA Design of a Spiking Neural Network.☆40Updated last year
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 6 years ago
- Framework for radix encoded SNN on FPGA☆13Updated 3 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆23Updated 5 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆58Updated 3 months ago
- A Spiking neural network simulator NEST base on FPGA‘s cluster（LIF NEURON）☆17Updated 5 years ago
- ☆17Updated 4 years ago
- ☆35Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆51Updated 4 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆26Updated 5 years ago
- ☆19Updated 4 years ago
- ☆89Updated 5 years ago
- ☆25Updated 3 years ago
- Stochastic Computing for Deep Neural Networks☆33Updated 4 years ago
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆28Updated 9 months ago
- ☆18Updated 2 years ago
- ☆22Updated 4 months ago