ChFrenkel / ReckOnLinks
ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.
☆92Updated 3 years ago
Alternatives and similar repositories for ReckOn
Users that are interested in ReckOn are comparing it to the libraries listed below
Sorting:
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆219Updated 6 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆75Updated 2 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆64Updated 4 years ago
- ☆55Updated 2 years ago
- Spiking Neural Network RTL Implementation☆64Updated 4 years ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆204Updated 2 years ago
- Fully opensource spiking neural network accelerator☆166Updated 2 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆40Updated 5 years ago
- A repository FPGA-friendly SNN models☆35Updated 4 years ago
- Framework for radix encoded SNN on FPGA☆18Updated 4 years ago
- FPGA Design of a Spiking Neural Network.☆46Updated last year
- ☆17Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆39Updated 6 years ago
- I will share some useful or interesting papers about neuromorphic processor☆28Updated last year
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆36Updated 6 years ago
- Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.☆65Updated last year
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated this week
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Updated 6 years ago
- Energy-efficient Event-driven Spiking Neural Network accelerator for FPGA with PyTorch integration☆108Updated this week
- ☆30Updated 3 years ago
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆28Updated last year
- ☆20Updated 4 years ago
- ☆100Updated 5 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆29Updated 6 years ago
- From Pytorch model to C++ for Vitis HLS☆20Updated this week
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆53Updated 4 years ago
- A Simulation Framework for Memristive Deep Learning Systems☆179Updated last year
- MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award☆16Updated last year
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆20Updated 5 years ago
- SNN on FPGA☆12Updated 3 years ago