Alternatives and similar repositories for sgemm_riscv

Users that are interested in sgemm_riscv are comparing it to the libraries listed below

• riscv / riscv-bfloat16
  ☆37Updated last year
• THU-DSP-LAB / llvm-project
  LLVM OpenCL C compiler suite for ventus GPGPU
  ☆53Updated this week
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆127Updated this week
• THU-DSP-LAB / ventus-gpgpu-isa-simulator
  Ventus GPGPU ISA Simulator Based on Spike
  ☆46Updated last week
• nibrunie / rvv-examples
  Example of RISC-V Vector programming
  ☆24Updated last week
• Xilinx / mlir-air
  ☆105Updated this week
• THU-DSP-LAB / ventus-gpgpu-cpp-simulator
  Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus
  ☆28Updated this week
• Jerc007 / Open-GPGPU-FlexGrip-
  FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
  ☆108Updated 2 years ago
• iree-org / iree-bare-metal-arm
  Example for running IREE in a bare-metal Arm environment.
  ☆40Updated last month
• ucb-bar / virgo
  Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC
  ☆36Updated 3 months ago
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆97Updated 2 months ago
• riscv / integrated-matrix-extension
  RISC-V Integrated Matrix Development Repository
  ☆17Updated 11 months ago
• RALC88 / riscv-vectorized-benchmark-suite
  RiVEC Bencmark Suite
  ☆121Updated 9 months ago
• riscv-stc / riscv-matrix-spec
  RISC-V Matrix Specification
  ☆22Updated 9 months ago
• tum-ei-eda / muriscv-nn
  muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.
  ☆86Updated 2 weeks ago
• nod-ai / iree-amd-aie
  IREE plugin repository for the AMD AIE accelerator
  ☆102Updated this week
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆33Updated 2 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆93Updated last year
• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆41Updated 11 months ago
• XUANTIE-RV / tvm
  TVM for chips base on Xuantie CPU, an open deep learning compiler stack.
  ☆30Updated last year
• arc-research-lab / Aries
  ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)
  ☆41Updated last week
• XUANTIE-RV / riscv-matrix-extension-spec
  A matrix extension proposal for AI applications under RISC-V architecture
  ☆152Updated 7 months ago
• ucb-bar / onnxruntime-riscv
  Fork of upstream onnxruntime focused on supporting risc-v accelerators
  ☆87Updated 2 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆111Updated last year
• OpenGPGPU / opengpgpu
  ☆72Updated 11 months ago
• suchandler96 / gem5-NVDLA
  ☆34Updated 5 months ago
• ucb-bar / saturn-vectors
  Chisel RISC-V Vector 1.0 Implementation
  ☆109Updated 2 weeks ago
• space-mit / riscv-ime-extension-spec
  Following the RISC-V IME extension standard, and reusing Vector register resources, these instructions can bring more than a tenfold perf…
  ☆66Updated last year
• agile-hw / labs
  Lab assignments for the Agile Hardware Design course
  ☆17Updated 3 months ago
• XUANTIE-RV / csi-nn2
  An optimized neural network operator library for chips base on Xuantie CPU.
  ☆93Updated last year