Example of RISC-V Vector programming
☆27Sep 4, 2025Updated 6 months ago
Alternatives and similar repositories for rvv-examples
Users that are interested in rvv-examples are comparing it to the libraries listed below
Sorting:
- This project records the process of optimizing SGEMM (single-precision floating point General Matrix Multiplication) on the riscv platfor…☆24Dec 11, 2024Updated last year
- PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases☆21Nov 26, 2020Updated 5 years ago
- ☆364Feb 24, 2026Updated last week
- RISC-V vector and other assembly code examples☆28Nov 4, 2020Updated 5 years ago
- A translator from ARM NEON intrinsics to RISCV-V Extension implementation☆41Aug 25, 2025Updated 6 months ago
- instant cross-platform jit engine inspired by Xbyak☆11Feb 22, 2026Updated last week
- Library to access /proc/device-tree from userspace in an embedded Linux. Under GNU GPL license.☆13Apr 9, 2018Updated 7 years ago
- MATLAB/Octave generator of Hamming ECC coding. Output format is Verilog HDL.☆12Dec 27, 2022Updated 3 years ago
- Unit tests generator for RVV 1.0☆103Nov 11, 2025Updated 3 months ago
- Terminal for working with COM-ports supporting Modbus protocol (Windows OS)☆12Feb 16, 2022Updated 4 years ago
- Full Support 32bit RISC-V in LLVM and CLANG for Vector Extension☆44Dec 21, 2020Updated 5 years ago
- BlueDBM hw/sw implementation using the bluespecpcie PCIe library☆12Dec 25, 2022Updated 3 years ago
- Yet another Linux distro for RISC-V.☆13Dec 25, 2025Updated 2 months ago
- A stream to RTL compiler based on MLIR and CIRCT☆16Nov 15, 2022Updated 3 years ago
- my fork of libxml2☆11May 11, 2011Updated 14 years ago
- Minimal Ethereum RPC Client in Rust☆11Nov 18, 2023Updated 2 years ago
- List of EOS peers for mainnet in config.ini format, and other relevant information to connect to the future mainnet☆12Jul 8, 2018Updated 7 years ago
- ☆12Dec 29, 2025Updated 2 months ago
- OpenMP front-end based on LLVM for CGRAs☆10Oct 2, 2022Updated 3 years ago
- Produce probabilities for economy-based environments.☆11Sep 10, 2022Updated 3 years ago
- I like to learn new things☆10Updated this week
- Kirk is the official executor of Linux Test Project☆16Feb 26, 2026Updated last week
- ☆17Nov 16, 2025Updated 3 months ago
- A hand-written recursive decent Verilog parser.☆10Jan 30, 2026Updated last month
- Python implementation in C++☆17Feb 24, 2026Updated last week
- (WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog☆12Sep 9, 2021Updated 4 years ago
- ☆11Nov 2, 2017Updated 8 years ago
- The kernel livepatching creation tool☆14Feb 25, 2026Updated last week
- CUDA implementation of Filecoin's PC2 operation☆12Jun 20, 2023Updated 2 years ago
- Shipyard Precourse Work Part 4☆10Mar 30, 2022Updated 3 years ago
- ☆12Sep 25, 2022Updated 3 years ago
- Official code base of the BEVDet series .☆11Oct 9, 2022Updated 3 years ago
- A blazing fast, MT-safe, lockfree and branchless circular byte buffer for SPSC in 50 loc☆12Sep 16, 2025Updated 5 months ago
- ☆15Dec 9, 2025Updated 2 months ago
- Fork of gem5 with support for manycore architectures. Includes models and scripts to evaluate a software-defined-vector architecture.☆12Oct 14, 2021Updated 4 years ago
- Device Tree Compiler for Windows☆15Aug 9, 2024Updated last year
- ☆11Dec 20, 2023Updated 2 years ago
- Language implementation demo☆10May 22, 2022Updated 3 years ago
- A list of awesome Cairo and STARK-adjacent projects☆16May 15, 2022Updated 3 years ago