tomverbeure / ecp5_jtag
Use ECP5 JTAG port to interact with user design
☆26Updated 3 years ago
Alternatives and similar repositories for ecp5_jtag:
Users that are interested in ecp5_jtag are comparing it to the libraries listed below
- CologneChip GateMate FPGA Module: GMM-7550☆21Updated last year
- Drop In USB CDC ACM core for iCE40 FPGA☆33Updated 3 years ago
- Reusable Verilog 2005 components for FPGA designs☆40Updated last year
- Small footprint and configurable SPI core☆41Updated last month
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆18Updated 2 years ago
- I want to learn [n]Migen.☆40Updated 5 years ago
- Full Speed USB DFU interface for FPGA and ASIC designs☆17Updated 11 months ago
- IceCore Ice40 HX based modular core☆46Updated 4 years ago
- Simplified environment for litex☆14Updated 4 years ago
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆14Updated 3 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆20Updated last year
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆61Updated 6 years ago
- ☆44Updated 2 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆62Updated 4 months ago
- KiCad symbol library for sky130 and gf180mcu PDKs☆30Updated last year
- A configurable USB 2.0 device core☆30Updated 4 years ago
- CRUVI Standard Specifications☆17Updated 9 months ago
- Picorv32 SoC that uses only BRAM, not flash memory☆12Updated 6 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆27Updated 2 years ago
- Utilities for the ECP5 FPGA☆18Updated 3 years ago
- assorted library of utility cores for amaranth HDL☆86Updated 4 months ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Change part number or package in a Xilinx 7-series FPGA bitstream☆37Updated 4 years ago
- Tiny tips for Colorlight i5 FPGA board☆56Updated 3 years ago
- Small footprint and configurable Inter-Chip communication cores☆55Updated last month
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆26Updated 4 years ago
- Miscellaneous ULX3S examples (advanced)☆75Updated 3 weeks ago
- PLEASE MOVE TO PAWSv2☆17Updated 3 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆84Updated 6 years ago