nikulshr / resnet_fpgaLinks
UCSD CSE 237D Spring '20 Course Project
☆19Updated 2 years ago
Alternatives and similar repositories for resnet_fpga
Users that are interested in resnet_fpga are comparing it to the libraries listed below
Sorting:
- Some attempts to build CNN on PYNQ.☆25Updated 6 years ago
- hls code zynq 7020 pynq z2 CNN☆89Updated 6 years ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆41Updated 5 years ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆75Updated 5 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆24Updated 6 years ago
- ☆36Updated last year
- HLS code for a BNN accelerator☆17Updated 7 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆28Updated 4 years ago
- Low-Precision YOLO on PYNQ with FINN☆34Updated 2 years ago
- 中文:☆108Updated 6 years ago
- ☆100Updated 5 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆71Updated 6 years ago
- ☆56Updated 2 years ago
- A DNN Accelerator implemented with RTL.☆68Updated last year
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆51Updated 5 years ago
- 在FPGA上部署深度学习项目☆24Updated 4 years ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆98Updated 10 months ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆86Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆39Updated 6 years ago
- Convolutional Neural Network Using High Level Synthesis☆90Updated 5 years ago
- The CNN based on the Xilinx Vivado HLS☆37Updated 4 years ago
- Workflow for Executing CNN Networks on Zynq Ultrascale+ with VITIS AI. Detailed analysis, configuration, and execution of Convolutional N…☆19Updated last year
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53Updated 7 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆105Updated 2 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆37Updated 5 years ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆21Updated 4 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆88Updated 3 years ago
- Vitis AI Lab: MNIST classifier☆19Updated 3 years ago
- Simulating implement of vgg16 network on Zynq-7020 FPGA☆43Updated 6 years ago