nikulshr / resnet_fpga
UCSD CSE 237D Spring '20 Course Project
☆15Updated last year
Alternatives and similar repositories for resnet_fpga:
Users that are interested in resnet_fpga are comparing it to the libraries listed below
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆22Updated 3 years ago
- HLS code for a BNN accelerator☆15Updated 6 years ago
- Some attempts to build CNN on PYNQ.☆24Updated 5 years ago
- hls code zynq 7020 pynq z2 CNN☆79Updated 5 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆34Updated 5 years ago
- FPGA and GPU acceleration of LeNet5☆35Updated 5 years ago
- The CNN based on the Xilinx Vivado HLS☆37Updated 3 years ago
- ☆29Updated 5 months ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆21Updated 3 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through r…☆9Updated 4 years ago
- Codes to implement MobileNet V2 in a FPGA☆24Updated 4 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆48Updated 6 years ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆68Updated 4 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆30Updated 5 years ago
- An OpenCL-Based FPGA Accelerator for Compressed YOLOv2☆37Updated 3 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆45Updated 4 years ago
- ☆26Updated 2 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆37Updated 5 years ago
- ☆51Updated last year
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆76Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- A DNN Accelerator implemented with RTL.☆63Updated last month
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆22Updated 5 years ago
- Low-Precision YOLO on PYNQ with FINN☆30Updated last year
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆17Updated last year
- ☆87Updated 4 years ago
- ☆17Updated 3 years ago
- ☆39Updated 5 years ago
- ☆43Updated 6 years ago