WalkerLau / GPU-CNN

Related projects ⓘ

Alternatives and complementary repositories for GPU-CNN

• soDLA-publishment / somnia
  Learn NVDLA by SOMNIA
  ☆26Updated 4 years ago
• SameLight / ITRI-OpenDLA
  Express DLA implementation for FPGA, revised based on NVDLA.
  ☆9Updated 5 years ago
• WuDan0399 / Integrate-NVDLA-and-TVM
  ☆30Updated last year
• sazczmh / Ultra96-PYNQ_A-simple-summary
  Ultra96 PYNQ入门之一次简单的总结
  ☆13Updated 4 years ago
• max2ma / shiftNet
  ☆13Updated 4 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆21Updated 3 years ago
• Caiyujie007 / OpenVPU
  This is an open CNN accelerator for everyone to use
  ☆14Updated 5 years ago
• suchandler96 / gem5-NVDLA
  ☆21Updated last month
• JunningWu / AIChip
  Aiming at an AI Chip based on RISC-V and NVDLA.
  ☆21Updated 6 years ago
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆25Updated last year
• ic-lab-duth / Fast-Float4HLS
  Fast Floating Point Operators for High Level Synthesis
  ☆17Updated last year
• zeasa / nvdla-compiler
  ☆42Updated 4 years ago
• Zaoldyeckk / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆51Updated 6 years ago
• ic-lab-duth / FusedGCN4HLS
  Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
  ☆22Updated 2 years ago
• meton-robean / PaperNotes
  记录阅读各类paper的想法笔记（关注体系结构，机器学习系统，深度学习，计算机视觉）
  ☆23Updated 5 years ago
• maao666 / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆24Updated 3 years ago
• Fibertree-Project / fibertree
  Fibertree emulator
  ☆11Updated last week
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆35Updated 4 years ago
• jgoeders / dac_sdc_2021
  ☆23Updated 3 years ago
• cs217 / cs217.github.io
  Course Webpage for CS 217 Hardware Accelerators for Machine Learning, Stanford University
  ☆98Updated last year
• sharc-lab / FPGA_ECE8893
  ☆30Updated 2 months ago
• Hosseinabady / SDSoC-Benchmarks
  ☆17Updated 3 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆42Updated 2 years ago
• sfox14 / darknet-zynq
  Accelerating DNN inference and training on Zynq
  ☆14Updated 4 years ago
• joycenerd / DNN-accelerator-on-zynq
  Digital Design Lab Spring 2019 Final Project
  ☆9Updated 5 years ago
• ZhangYuQAQ / Hardware-Acceleration-Circuit-Design-of-Object-Detection-Network-Based-on-FPGA
  2020 xilinx summer school
  ☆17Updated 4 years ago
• he-actlab / polymath
  ☆19Updated last year
• amohant4 / HLS_for_CNN
  This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.
  ☆13Updated 6 years ago
• tissue3 / EyerissSimulator
  Eyeriss chip simulator
  ☆32Updated 4 years ago