Alternatives and similar repositories for GPU-CNN:

Users that are interested in GPU-CNN are comparing it to the libraries listed below

• SameLight / ITRI-OpenDLA
  Express DLA implementation for FPGA, revised based on NVDLA.
  ☆9Updated 5 years ago
• soDLA-publishment / somnia
  Learn NVDLA by SOMNIA
  ☆33Updated 5 years ago
• Fibertree-Project / fibertree
  Fibertree emulator
  ☆12Updated 4 months ago
• JunningWu / AIChip
  Aiming at an AI Chip based on RISC-V and NVDLA.
  ☆20Updated 7 years ago
• Caiyujie007 / OpenVPU
  This is an open CNN accelerator for everyone to use
  ☆14Updated 5 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆36Updated 4 years ago
• max2ma / shiftNet
  ☆14Updated 5 years ago
• WuDan0399 / Integrate-NVDLA-and-TVM
  ☆30Updated 2 years ago
• jinhachung / tptpu-sim
  A Toy-Purpose TPU Simulator
  ☆15Updated 9 months ago
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆27Updated last year
• SCLUO / ITRI-OpenDLA
  OpenDLA for trying the demo and FPGA solution
  ☆16Updated 2 years ago
• sazczmh / Ultra96-PYNQ_A-simple-summary
  Ultra96 PYNQ入门之一次简单的总结
  ☆14Updated 4 years ago
• jgoeders / dac_sdc_2021
  ☆23Updated 3 years ago
• ic-lab-duth / FusedGCN4HLS
  Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
  ☆22Updated 2 years ago
• microideax / T-DLA
  ☆19Updated 5 years ago
• zeasa / nvdla-compiler
  ☆42Updated 5 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆22Updated 3 years ago
• lukasc-ch / ExtendedBitPlaneCompression
  Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…
  ☆17Updated 5 years ago
• joycenerd / DNN-accelerator-on-zynq
  Digital Design Lab Spring 2019 Final Project
  ☆11Updated 5 years ago
• xyzxinyizhang / 2019-DAC-System-Design-Contest
  ☆35Updated 5 years ago
• mnnuahg / StamicCGRA
  A static dataflow CGRA with dynamic dataflow execution capability
  ☆10Updated 3 years ago
• meton-robean / PaperNotes
  记录阅读各类paper的想法笔记（关注体系结构，机器学习系统，深度学习，计算机视觉）
  ☆24Updated 5 years ago
• Xingxiangrui / MTCNN_with_HLS_On_FPGA
  MTCNN with convolution reprogramed in c
  ☆14Updated 5 years ago
• Zaoldyeckk / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆51Updated 6 years ago
• IBM / pfloat
  A 8-/16-/32-/64-bit floating point number family
  ☆17Updated 3 years ago
• Hosseinabady / SDSoC-Benchmarks
  ☆16Updated 4 years ago
• ic-lab-duth / Fast-Float4HLS
  Fast Floating Point Operators for High Level Synthesis
  ☆20Updated 2 years ago
• jiaaom / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆25Updated 4 years ago
• PSCLab-ASU / Systolic-CNN
  ☆15Updated 4 years ago
• GATECH-EIC / AutoDNNchip
  ☆70Updated 5 years ago