Alternatives and similar repositories for AXI_SRAM

Users that are interested in AXI_SRAM are comparing it to the libraries listed below

• kkenshin1 / AXI-Ethernet-UVM
  A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM
  ☆30Updated 3 years ago
• seabeam / yuu_ahb
  UVM AHB VIP
  ☆93Updated 4 months ago
• wangjidwb123 / AHB-SRAMC
  IC Verification & SV Demo
  ☆57Updated 4 years ago
• freecores / dma_axi
  AXI DMA 32 / 64 bits
  ☆124Updated 11 years ago
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆42Updated 3 years ago
• Travissss / ahb2apb-bridge
  An uvm verification env for ahb2apb bridge
  ☆58Updated 4 years ago
• muneebullashariff / i2c_vip
  Verification IP for I2C protocol
  ☆51Updated 4 years ago
• flyskywalker / ahb_sramc
  ahb scram controller, design and verification
  ☆28Updated 7 years ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆105Updated 5 years ago
• marcoz001 / axi-uvm
  yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
  ☆136Updated 8 years ago
• wenxuan-hu / SSRL_work
  work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework
  ☆38Updated 3 years ago
• dadongshangu / async_FIFO
  This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…
  ☆65Updated 2 years ago
• Jon3Y / AMBA
  AHB/APB SRAM Inf, VCS&Verdi Sim.
  ☆15Updated 3 years ago
• lucky-wfw / ARM_AMBA_Design
  Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
  ☆136Updated 4 years ago
• ForrestBlue / cortexm0ds
  ☆74Updated 10 years ago
• JakodYuan / SVK-AMBA-VIP
  Simple AMBA VIP, Include axi/ahb/apb
  ☆30Updated last year
• techvinodreddy / UART-IP-CORE16550A-Verification-UVM
  The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with a …
  ☆18Updated 4 years ago
• Lampro-Mellon / apb-uart-uvm-env
  ☆48Updated 2 years ago
• JoseIuri / UVM-APB_RAL
  This repository contains an example of the use of UVM Register Abstraction Layer in a verification of a simple APB DUT.
  ☆48Updated 5 years ago
• akzare / Async_FIFO_Verification
  Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.
  ☆59Updated 5 years ago
• muneebullashariff / axi4_vip
  Verification IP for APB protocol
  ☆75Updated 5 years ago
• courageheart / AMBA_APB_SRAM
  AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…
  ☆191Updated 7 years ago
• freecores / apbi2c
  APB to I2C
  ☆43Updated 11 years ago
• nelsoncsc / ISP_UVM
  A Framework for Design and Verification of Image Processing Applications using UVM
  ☆117Updated 8 years ago
• mgtm98 / pcie5_phy
  PCIE 5.0 Graduation project (Verification Team)
  ☆97Updated 2 years ago
• seonskim / verilog_axi-interconnect
  AXI Interconnect
  ☆56Updated 4 years ago
• seabeam / yuu_apb
  UVM APB VIP, part of AMBA3&AMBA4 feature supported
  ☆34Updated 5 years ago
• KafCoppelia / uvm-mcdf
  Mirror of william_william/uvm-mcdf on Gitee
  ☆29Updated 3 years ago
• GodelMachine / AHB2
  AMBA AHB 2.0 VIP in SystemVerilog UVM
  ☆160Updated 5 years ago
• mayurkubavat / UVM-Examples
  UVM examples and projects
  ☆156Updated 7 months ago