AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).
☆198Jul 23, 2018Updated 7 years ago
Alternatives and similar repositories for AMBA_APB_SRAM
Users that are interested in AMBA_APB_SRAM are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ahb scram controller, design and verification☆29Jun 20, 2018Updated 7 years ago
- AMBA AHB 2.0 VIP in SystemVerilog UVM☆160Mar 31, 2020Updated 6 years ago
- AMBA AXI VIP☆457Jun 28, 2024Updated last year
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆111Jul 2, 2023Updated 2 years ago
- UVM AHB VIP☆97Sep 13, 2025Updated 7 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- UVM VIP architecture generator☆21Aug 24, 2020Updated 5 years ago
- Verification IP for AMBA APB Protocol☆34Nov 7, 2023Updated 2 years ago
- Verification AXI-4 bus standard using UVM and System Verilog☆16Apr 7, 2018Updated 8 years ago
- VIP for AXI Protocol☆171May 24, 2022Updated 3 years ago
- Verification IP for APB protocol☆77Dec 18, 2020Updated 5 years ago
- UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC2…☆16Dec 23, 2024Updated last year
- uvm AXI BFM(bus functional model)☆268Jun 23, 2013Updated 12 years ago
- yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/☆134Nov 29, 2017Updated 8 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆119Nov 27, 2017Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Final Project for my course in Advanced Verification with SystemVerilog OOP☆22Dec 17, 2021Updated 4 years ago
- This repository contains an example of the use of UVM Register Abstraction Layer in a verification of a simple APB DUT.☆50Jun 19, 2020Updated 5 years ago
- To design test bench of the APB protocol☆20Dec 30, 2020Updated 5 years ago
- ☆19Aug 11, 2022Updated 3 years ago
- 支持AXI总线协议的8k×8 SP SRAM☆27Mar 26, 2020Updated 6 years ago
- A UVM verification with a APB BFM (Bus functional model), connected to two write-only DAC and two read-only ADC slaves. The sequence gene…☆17Jul 7, 2018Updated 7 years ago
- AMBA bus lecture material☆532Jan 21, 2020Updated 6 years ago
- Awesome ASIC design verification☆353Feb 9, 2022Updated 4 years ago
- IC Verification & SV Demo☆59Sep 29, 2021Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆12May 31, 2016Updated 9 years ago
- ☆49Nov 3, 2023Updated 2 years ago
- AHB to APB Bridge VIP☆30Mar 4, 2019Updated 7 years ago
- Verification IP for I2C protocol☆52Sep 22, 2021Updated 4 years ago
- Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence☆40Jun 24, 2020Updated 5 years ago
- UVM resource from github, run simulation use YASAsim flow☆33Apr 25, 2020Updated 6 years ago
- UVM APB VIP, part of AMBA3&AMBA4 feature supported☆35Aug 24, 2020Updated 5 years ago
- This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…☆65Oct 19, 2023Updated 2 years ago
- UART design in SV and verification using UVM and SV☆55Nov 30, 2019Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆29May 11, 2021Updated 4 years ago
- wifi☆12Jun 13, 2017Updated 8 years ago
- UVM examples and projects☆161Jun 28, 2025Updated 10 months ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆31Jun 1, 2022Updated 3 years ago
- SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core☆162Jul 16, 2018Updated 7 years ago
- APB VIP (UVM)☆18Sep 6, 2018Updated 7 years ago
- SystemVerilog VIP for AMBA APB protocol☆88Nov 11, 2021Updated 4 years ago