为了学习UVM验证相关知识,需要动手尝试实际的项目。作为一个初学者,难以接触到实际的项目,于是我从夏宇闻老师的《Verilog数字系统设计教程》一书中,挑选出一个简单的小设计,作为我的验证对象,并围绕它编写了UVM验证环境。
☆25Oct 9, 2020Updated 5 years ago
Alternatives and similar repositories for UVM_Verification_for_P2S_Data_Converter
Users that are interested in UVM_Verification_for_P2S_Data_Converter are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Title : Communication Bridge between I2C and SPI Platform : RTL Coding (Verilog/System Verilog/VHDL) Duration : 1 Month Description : Bot…☆17Aug 21, 2018Updated 7 years ago
- In this repository, the RTL design and verification of the axi2apb bridge communication protocol are realized. In this system, the prefer…☆21Apr 11, 2022Updated 4 years ago
- SystemVerilog UVM testbench example☆38May 8, 2024Updated 2 years ago
- 数字IC验证案例(SV and UVM)☆30Apr 27, 2021Updated 5 years ago
- 8b10b Encoder/Decoder☆13Jul 17, 2014Updated 11 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…☆66Oct 19, 2023Updated 2 years ago
- UVM Testbench to verify serial transmission of data between SPI master and slave☆55Jul 4, 2020Updated 5 years ago
- UVM examples and projects☆162Jun 28, 2025Updated 11 months ago
- This is for uvm_tb_gen☆53Feb 13, 2025Updated last year
- Bitmap Processing Library & AXI-Stream Video Image VIP☆37Apr 11, 2022Updated 4 years ago
- ☆12May 31, 2016Updated 10 years ago
- An UVM example of UART☆20Aug 31, 2020Updated 5 years ago
- ahb scram controller, design and verification☆29Jun 20, 2018Updated 7 years ago
- Sample UVM code for axi ram dut☆39Dec 14, 2021Updated 4 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- PCIe System Verilog Verification Environment developed for PCIe course☆15Mar 26, 2024Updated 2 years ago
- A UVM verification with a APB BFM (Bus functional model), connected to two write-only DAC and two read-only ADC slaves. The sequence gene…☆17Jul 7, 2018Updated 7 years ago
- Freecellera fork of the Universal Verification Methodology (SystemVerilog verification library from Accellera.org)☆11Apr 9, 2015Updated 11 years ago
- EasierUVM from Doulos now written in Python for easier UVM with framework and template generator☆13Sep 28, 2022Updated 3 years ago
- A complete UVM verification testbench for FIFO☆14Mar 21, 2016Updated 10 years ago
- This is my MTech Thesis Dissertation Topic.☆10Oct 21, 2022Updated 3 years ago
- C++软件开发工程师面试学习笔记☆12Oct 2, 2020Updated 5 years ago
- ☆15Nov 11, 2015Updated 10 years ago
- 支持AXI总线协议的8k×8 SP SRAM☆28Mar 26, 2020Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Built a test environment using SystemVerilog to verify FIFO. Used QuestaSim to design and verify the module in SystemVerilog and Verilog.…☆39Feb 6, 2019Updated 7 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆14Nov 9, 2015Updated 10 years ago
- Computing calibrated prediction intervals for neural network regressors☆10May 28, 2019Updated 7 years ago
- python web enhence tutorials☆20Aug 4, 2020Updated 5 years ago
- 复旦大学 数字逻辑与部件设计实验 2020秋☆54Feb 18, 2022Updated 4 years ago
- General Purpose I/O agent written in UVM☆17Jun 29, 2017Updated 8 years ago
- AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…☆197Jul 23, 2018Updated 7 years ago
- RiscSoC 是一个芯片集成项目,包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成,部分 SoC 使用的自己设计的内核☆13Apr 26, 2022Updated 4 years ago
- Verification of an Asynchronous FIFO using UVM & SVA☆13Jun 26, 2025Updated 11 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Wavious DDR (WDDR) Physical interface (PHY) Software☆26Feb 16, 2022Updated 4 years ago
- Synchronous FIFO Testbench☆12Apr 17, 2022Updated 4 years ago
- This is full tutorial of UVM (Universal Verification Methodology) for a simple ALU unit☆29Jul 27, 2018Updated 7 years ago
- Super Resolution Convolutional Neural Network (SRCNN) for Python/Torch, Numpy and Avnet's ZedBoard☆18Feb 24, 2021Updated 5 years ago
- Mirror of william_william/uvm-mcdf on Gitee☆38Nov 30, 2022Updated 3 years ago
- Workflow for Executing CNN Networks on Zynq Ultrascale+ with VITIS AI. Detailed analysis, configuration, and execution of Convolutional N…☆21Apr 8, 2024Updated 2 years ago
- FPGA-based SNN Accelerator Toy☆44Apr 17, 2026Updated 2 months ago