Alternatives and similar repositories for Charm

Users that are interested in Charm are comparing it to the libraries listed below

• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆59Updated last year
• PrincetonUniversity / accelerator-wall
  Repository for the tools and non-commercial data used for the "Accelerator wall" paper.
  ☆51Updated 6 years ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆41Updated 2 months ago
• cucapra / latte21
  Languages, Tools, and Techniques for Accelerator Design
  ☆33Updated 3 years ago
• scale-lab / la-core
  Linear algebra accelerators for RISC-V (published in ICCD 17)
  ☆66Updated 7 years ago
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆80Updated 6 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆24Updated 8 months ago
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆50Updated 2 years ago
• zhemao / chisel-float
  Floating point modules for CHISEL
  ☆31Updated 10 years ago
• sfu-arch / muir
  ☆24Updated 4 years ago
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆34Updated last week
• StanfordAHA / aha
  ☆60Updated this week
• kiabuzz / CompressedLUT
  A tool to generate optimized hardware files for univariate functions.
  ☆29Updated last year
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆77Updated 6 years ago
• StanfordAHA / lake
  Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…
  ☆22Updated 3 weeks ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆41Updated 2 years ago
• cornell-zhang / uptune
  A Generic Distributed Auto-Tuning Infrastructure
  ☆22Updated 4 years ago
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆69Updated last year
• bring-your-own-core / byoc
  The OpenPiton Platform
  ☆29Updated 2 years ago
• Xilinx / xacc
  Heterogeneous Accelerated Computed Cluster (HACC) Resources Page
  ☆22Updated 3 weeks ago
• cdsc-github / parade-ara-simulator
  PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration
  ☆48Updated 3 years ago
• mrc-donato / CHIPKIT-Tutorial
  ☆15Updated 4 years ago
• template-hls / template-hls-float
  ☆30Updated 6 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆92Updated last year
• StanfordAHA / garnet
  Next generation CGRA generator
  ☆113Updated 3 weeks ago
• Errare-humanum-est / ProtoGen
  Designing directory cache coherence protocols is complicated because coherence transactions are not atomic in modern multicore processors…
  ☆16Updated 3 years ago
• icgrp / hipr
  ☆16Updated 2 years ago
• UIUC-ChenLab / rip
  ☆16Updated 7 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated last year