Alternatives and similar repositories for peppercornenumerator

Users that are interested in peppercornenumerator are comparing it to the libraries listed below

• ProfessorShaban / risc-v-simulator
  RISC-V assembler/simulator with GUI
  ☆13Updated 3 years ago
• Mogball / declarative-mlir-compiler
  Declarative MLIR compilers in Python!
  ☆35Updated 4 years ago
• David-Durst / embeddedHaskellAetherling
  ☆26Updated 2 years ago
• llvm / eudsl
  Embedded Universal DSL: a good DSL for us, by us
  ☆44Updated this week
• hipacc / hipacc
  A domain-specific language and compiler for image processing
  ☆76Updated 4 years ago
• MPACT-ORG / mpact-compiler
  Retargetable ML compilers for the twenty-first century!
  ☆13Updated 4 months ago
• synogate / gatery
  Gatery, a library for circuit design.
  ☆20Updated 8 months ago
• cliffordwolf / bextdep
  Reference Hardware Implementations of Bit Extract/Deposit Instructions
  ☆25Updated 7 years ago
• gussmith23 / glenside
  A pure, low-level tensor program representation enabling tensor program optimization via program rewriting. See the web demo at https://g…
  ☆70Updated 3 months ago
• tobiasgrosser / islplot
  Library to plot integer sets and maps
  ☆53Updated 8 years ago
• cucapra / latte21
  Languages, Tools, and Techniques for Accelerator Design
  ☆33Updated 3 years ago
• chipsalliance / fasm
  FPGA Assembly (FASM) Parser and Generator
  ☆95Updated 3 years ago
• vegaluisjose / vast
  Verilog AST
  ☆21Updated last year
• BlairArchibald / YewPar
  A Collection of High Performance Parallel Skeletons for Tree Search Problems
  ☆22Updated 2 months ago
• sdiehl / mlir-egglog
  A toy compiler for NumPy array expressions that uses e-graphs and MLIR
  ☆104Updated 3 weeks ago
• ChezJrk / verified-scheduling
  ☆41Updated last year
• cjdelisle / libposit
  A library for working with the posit number type.
  ☆15Updated 4 years ago
• SiliconSemantics / firrtlator
  firrtlator is a FIRRTL C++ library
  ☆23Updated 8 years ago
• jameshegarty / rigel
  Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…
  ☆56Updated 4 years ago
• FPBench / FPBench
  A standard for floating point accuracy benchmarks
  ☆52Updated 5 months ago
• pavelkryukov / AoAoAoTT
  Interchangeable AoS and SoA containers
  ☆25Updated 3 years ago
• rsnikhil / Bluespec_BSV_Formal_Semantics
  Formal semantics of BSV (Bluespec SystemVerilog), given as a Haskell Program and accompanying document
  ☆18Updated 9 years ago
• thinkoco / de10-nano-riscv
  A RISC-V SoC ( Hbird e203 ) on Terasic DE10-Nano
  ☆38Updated 5 years ago
• tomverbeure / mr1
  MR1 formally verified RISC-V CPU
  ☆53Updated 6 years ago
• weirdindiankid / cacheflow
  CacheFlow is a Linux kernel module that exposes the contents of the last-level cache on *most* ARM machines.
  ☆17Updated last year
• YosysHQ / abc
  ABC: System for Sequential Logic Synthesis and Formal Verification
  ☆29Updated 3 weeks ago
• mangpo / swizzle-inventor
  A framework that helps implementing swizzle GPU kernels
  ☆42Updated 5 years ago
• wpmed92 / shaderpulse
  🚧 A work-in-progress GLSL compiler targeting SPIR-V mlir 🚧
  ☆20Updated 10 months ago
• leonardt / verilogAST-cpp
  C++17 implementation of an AST for Verilog code generation
  ☆24Updated 2 years ago
• pku-minic / first-step-rs
  Take your first step in writing a compiler. Implemented in Rust.
  ☆16Updated 2 years ago