sfu-arch / needle
☆14Updated 3 years ago
Alternatives and similar repositories for needle:
Users that are interested in needle are comparing it to the libraries listed below
- Heterogeneous simulator for DECADES Project☆32Updated 10 months ago
- ☆91Updated last year
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 2 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆121Updated 5 years ago
- EQueue Dialect☆40Updated 3 years ago
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- agile hardware-software co-design☆46Updated 3 years ago
- The gem5-X open source framework (based on the gem5 simulator)☆40Updated last year
- ☆25Updated last year
- Creating beautiful gem5 simulations☆48Updated 4 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆49Updated 6 years ago
- ☆16Updated 4 years ago
- ☆15Updated 2 years ago
- CGRA Compilation Framework☆83Updated last year
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆41Updated 7 years ago
- Artifact, reproducibility, and testing utilites for gem5☆21Updated 3 years ago
- ILA Model Database☆22Updated 4 years ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆23Updated 2 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- Stencil with Optimized Dataflow Architecture Compiler☆16Updated 4 years ago
- A Language for Closed-form High-level ARchitecture Modeling☆20Updated 5 years ago
- A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…☆20Updated 9 months ago
- ☆57Updated last year
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆31Updated last year
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆38Updated 6 years ago
- Synthetic Traffic Models Capturing a Full Range of Cache Coherent Behaviour☆14Updated 5 years ago
- The Chronos FPGA Framework to accelerate ordered applications☆22Updated 4 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 6 months ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆64Updated 9 months ago